The answer desk
What is the India Semiconductor Mission budget?
Published 25 August 2026. Facts verified to 25 August 2026 unless dated otherwise.
The first phase of the Semicon India programme, approved in December 2021, carried an incentive framework of Rs 76,000 crore offering up to 50 percent fiscal support. On 15 July 2026 the Union Cabinet approved Semicon 2.0 with a total budget outlay of Rs 1,27,500 crore. Against the first framework, twelve manufacturing units carrying over Rs 1.64 lakh crore of investment have been approved. These figures were checked against Press Information Bureau releases on 25 August 2026.
The numbers, with the date they were checked
Three figures answer this question, and each belongs to a different object, which is why the answer is so often garbled. The first phase of the Semicon India programme, approved by the Union Cabinet in December 2021, is supported by an incentive framework of Rs 76,000 crore, offering fiscal support of up to 50 percent for silicon fabs, compound semiconductor facilities, assembly and testing units and chip design, per the Press Information Bureau backgrounder of 7 February 2026 DURABLE. The second phase, titled Semicon 2.0, was approved by the Union Cabinet on 15 July 2026 with a total budget outlay of Rs 1,27,500 crore DURABLE. Against the first framework, twelve manufacturing units with cumulative investment of over Rs 1.64 lakh crore had been approved as of that same Cabinet release DURABLE.
This desk checked all three against Press Information Bureau releases on 25 August 2026, and the date stamp is not decoration. The published position moved between two primary documents five months apart: the backgrounder of 7 February 2026 recorded ten projects and Rs 1.60 lakh crore of approved investment across six states as of December 2025 DURABLE, and the Cabinet release of 15 July 2026 recorded twelve units and over Rs 1.64 lakh crore. Any page quoting a figure without saying when it was true is quoting a photograph as though it were a live feed. The project-count question is handled separately at how many semiconductor projects India has approved.
What Rs 76,000 crore actually is
It is an incentive framework, not an administrative budget and not a sum handed to any single project. The India Semiconductor Mission is the nodal body under the Ministry of Electronics and Information Technology that appraises proposals; the money sits in the programme, and and in practice every approved unit has arrived by way of a dated Union Cabinet decision rather than an administrative order. The programme mechanics are set out at the India Semiconductor Mission explained.
The structure of the support is a share of project cost rather than a fixed grant, capped at half for the categories named above. That design has a consequence people rarely follow through. The Dholera fab alone was approved at Rs 91,000 crore, which is larger than the entire first-phase framework. A programme whose framework is Rs 76,000 crore can approve projects worth far more than Rs 76,000 crore precisely because it pays a share, and because that share is disbursed over years against expenditure rather than paid at approval. Reading the framework as a spending cap on the industry, rather than as a cap on the government's own contribution, produces immediate and obvious nonsense.
What the first phase bought
The composition of the twelve approved units, as stated in the Cabinet release of 15 July 2026, is one silicon fab, one silicon carbide fab, one integrated gallium nitride micro LED display fab and nine packaging units, expected to serve consumer appliances, industrial electronics, automobiles, power electronics, telecommunications and aerospace. Of the twelve, three companies, Micron, Kaynes and CG Semi, had started commercial production by that date, with one further unit expected to begin during 2026 DURABLE.
Two readings follow. The first is that the portfolio is overwhelmingly back-end. Nine of twelve units are packaging plants, which is the rational first rung for a country entering this industry, because assembly and test costs a fraction of a fab, hires faster and reaches revenue in a few years rather than most of a decade. The second is that the front-end is a single plant. There is exactly one silicon fab in the approved list, and it is the Dholera project, which means the programme's manufacturing credibility rests unusually heavily on one site. The Tata Electronics file keeps that project's record, and the wider portfolio is mapped at semiconductor manufacturing in India.
The movement between the two published totals is also worth reconciling, because it is small and it is instructive. Rs 1.60 lakh crore in December 2025 became over Rs 1.64 lakh crore by July 2026, a difference of roughly Rs 4,000 crore. The Union Cabinet cleared two further semiconductor units in May 2026, one at Dholera and one at Surat, with a combined value reported above Rs 3,900 crore REPORTED. Both published totals are rounded, so this reconciliation is approximate rather than exact, but the shape of it holds: the second year of additions was a modest one in money terms, and neither addition changed the number of silicon fabs in the portfolio, which is still one.
Semicon 2.0 and its Rs 1,27,500 crore
The second phase was announced in the Union Budget for 2026-27 under the name India Semiconductor Mission 2.0 and approved by the Union Cabinet on 15 July 2026 under the name Semicon 2.0. The naming difference is worth noting only because it makes searching for the primary document harder than it should be; the Cabinet decision is the operative instrument, and it carries a total budget outlay of Rs 1,27,500 crore.
The release organises the phase around six pillars: chip design; machines and materials, meaning incentives for companies making semiconductor equipment, materials, chemicals and gases; attracting further fabs, including silicon, compound, discrete and display fabs; strengthening the assembly and test industry with a focus on bringing more advanced technologies into the country; research and development aimed at nodes more advanced than the 28 to 110 nanometre range where the journey began; and talent, where the release records 315 universities training students on chip design tools and around 68,000 students trained to date.
The most consequential change from the first phase is the second pillar. Phase one bought capacity, and every machine and every chemical that the capacity runs on is imported. Supporting the layer beneath the fabs is a slower and far less tractable intervention, because an equipment or materials supplier sells nothing until a customer fab has qualified its product, and qualification here is counted in years of testing rather than in sales calls. Our reading of that shift sits at the phase-two file, which was written before the Cabinet decision and recorded the Budget announcement; this page carries the approved outlay and supersedes the earlier page's framing on that specific number.
Outlay is not spending, and the annual line proves it
An outlay is a ceiling authorised across the life of a scheme. What the government expects to spend in a single year is a different figure, published in that year's budget provision, and it is much smaller. For 2026-27 the Modified Programme for Development of Semiconductor and Display Manufacturing Ecosystem in India carries a total financial outlay of Rs 8,000 crore, and a provision of Rs 1,000 crore was made for the second phase for the same financial year, with an emphasis on industry-led research and training centres, per the backgrounder of 7 February 2026 DURABLE.
Put the numbers side by side and the gap between announcement and cash flow becomes visible. A scheme with a headline of Rs 1,27,500 crore was given Rs 1,000 crore in its first financial year, which is what a scheme approved in July of that year would be expected to receive and which is also a reminder of how these programmes actually pay out. Nothing about that is scandalous. It becomes a problem only when the headline number is quoted as though it described money already at work in the economy.
Committed, approved, disbursed: three different words
The published record supports statements about approval. It supports far less about disbursement. Cumulative approved investment of over Rs 1.64 lakh crore is a statement about what companies have committed to spend, not about what the government has paid, and this record has seen no published figure for total support disbursed under the programme to date. The same holds project by project: the Dholera fab's fiscal support agreement was signed on 5 March 2025, and neither its milestone schedule nor any tranche released against it is public, as set out at who funds the Dholera fab.
The consequence for anyone tracking this programme is that the honest scoreboard has three columns and most coverage prints only the first. Approved is a Cabinet date. Committed is an agreement. Disbursed is a payment. A programme can look large in the first column for years before the third column moves.
How it compares with the big foreign programmes
Combining the two Indian phases gives an announced framework of about Rs 2,03,500 crore. Converted at the rupee to dollar ratio implied by our own record, where the Dholera fab's Rs 91,000 crore is reported as roughly eleven billion dollars, that is on the order of twenty-four billion dollars, a derivation offered as illustrative arithmetic rather than as a published figure, since exchange rates move and none of these programmes publishes a conversion.
Against that, the United States CHIPS and Science Act of 2022 is commonly reported as providing about 52.7 billion dollars for semiconductor provisions alongside an investment tax credit, and the European Chips Act as targeting the mobilisation of more than 43 billion euros of public and private investment by 2030 REPORTED on both headlines, which are the programmes' own published summaries and were not verified against appropriation records on the date of this page.
The more useful comparison is structural, because those three numbers are not the same kind of object. India's is a capex-share subsidy that pays up to half of eligible project cost and is stacked further by states, with Gujarat contributing 40 percent of the central capital assistance DURABLE. The American programme pairs appropriated grants with a tax credit, which shifts a large part of the support off the appropriation line entirely. The European figure is a mobilisation target blending public and private money, so it measures ambition about total investment rather than treasury commitment. Ranking the three by headline size compares a subsidy pot, a mixed instrument and an investment target as if they were the same measurement. The instrument-by-instrument reading is at chips acts compared.
The design column, where the cheapest money sits
One part of the programme costs very little and is judged on a different scale from the rest, which is why it tends to disappear from budget coverage. The design-linked incentive supports design companies rather than plants, and the published indicators for 2026-27 are thirty design companies supported and 200 design personnel employed TARGET. Those are small numbers next to a manufacturing headline in the lakhs of crores, and they should be, because a design company needs engineers, tool licences and access to a foundry process rather than a cleanroom.
The returns are reported on a matching scale. As of January 2026, the scheme supported twenty-four semiconductor design startups, which had together attracted nearly Rs 430 crore in venture capital funding, per the backgrounder of 7 February 2026. By the Cabinet release of 15 July 2026 the count of approved design projects from startups and small enterprises stood at twenty-four, with 105 startups and small enterprises granted access to industry-standard design tools.
The honest way to read this column is that it buys optionality rather than capacity. A column measured in supported firms and employed engineers cannot move a manufacturing statistic, and it was never meant to. What it can do is create firms that own products rather than sell engineering hours, and that outcome is measured in years and in tape-outs rather than in wafer starts. Judging the design line by the yardstick used for fabs, or adding the two together into a single success claim, misreads what each instrument is for.
How this desk will score the second phase
Not by the outlay, which is now known, and not by announcements, which will be plentiful. Three things will settle whether Rs 1,27,500 crore was well spent. The first test is commercial rather than ceremonial: an Indian-built tool or an Indian-made material accepted into production by a fab that could have bought from anyone, followed by a repeat order. Whether a second silicon fab is approved, since one fab is a project and two is the beginning of an industry. And whether the disbursement column starts getting published, because a programme that reports approvals for a decade without reporting payments is a programme that cannot be audited by anyone outside it. This record will track all three and will date every figure it prints.