Section two

Semiconductors

Published 3 August 2026. Facts verified to 27 July 2026 unless dated otherwise.

Dholera's claim on the global chip map, tracked layer by layer: the anchor fab, the equipment, the gases and materials, the expansion clearances and the claims that are not yet builds.

The silicon stack, layer by layer

The anchor. Tata + PSMC, Rs 91,000 crore, under construction, commercial production now guided to mid-2028 TARGET and commercial output targeted for mid 2028. Approved by the Union Cabinet on 29 February 2024 under the India Semiconductor Mission, with the Fiscal Support Agreement signed 5 March 2025 DURABLE.

The equipment layer. ASML's lithography MoU with Tata Electronics, announced 16 May 2026 REPORTED.

The materials and gases layer. INOX Air Products' reported Rs 500 crore specialty gas hub with a 200 TPD air separation unit, cold box reported erected REPORTED, and Fujifilm's exploratory materials MoU of 30 June 2026 REPORTED.

The expansion layer. Two further semiconductor units for Gujarat, at Dholera and Surat, cleared by the Union Cabinet in May 2026 at a combined value above Rs 3,900 crore DURABLE on the clearance.

The claim layer. The solo Vedanta fab claim, reported but unconfirmed, kept firmly apart from the confirmed anchor.

The two dates that matter

mid-2028, the commercial-production guidance. Both sit on the promise vs delivery ledger, where they will be scored honestly when they arrive. A fab that reaches commercial output within months of its guidance would put Dholera on a very short global list of greenfield sites that delivered. No first-silicon date has been published by the company or the government, and this record does not supply one.

What the 28 to 110 nanometre band is actually for

The node range published for the Dholera fab, 28, 40, 55, 90 and 110 nanometres DURABLE, sits several generations behind the leading edge, and that is the design of the plant, not a shortcoming. Counted in units rather than revenue, most semiconductors made in the world are made on processes of this vintage or older. Tata names power management integrated circuits and microcontrollers as the intended products DURABLE, and both belong in this band for physical reasons. Analog circuits depend on transistors matching one another, and matching improves with device area rather than with scaling. Power management parts handle voltages well above the one volt or so at which advanced logic runs, needing thicker gate oxides and longer channels. Microcontrollers embed their own flash memory, which becomes difficult below roughly 28 nanometres.

The economics differ as sharply as the physics. A leading-edge fab needs extreme ultraviolet lithography and tens of billions of dollars of capital, while a 300mm mature-node line runs at a fraction of that capital intensity per wafer start. What it gains in cheaper capital it loses in pricing power, competing against fully depreciated capacity in Taiwan, China, Japan, Korea and Europe. In that market the variable deciding profitability is loading. Depreciation, air handling, ultrapure water and technical headcount are largely fixed, so a fab running at half its rated starts does not earn half the margin, it usually earns none. At a rated capacity of up to 50,000 wafer starts a month DURABLE Dholera would sit in the mid-size band internationally, and since a 300mm wafer offers roughly seventy thousand square millimetres of area before edge exclusion, a small analog die yields several thousand candidates.

Diversification is a real tailwind, and it does not buy customers

The strategic case for mature-node capacity outside East Asia was made by the shortage of late 2020 to 2022, when carmakers discovered that a two dollar microcontroller could idle an assembly line and that its supply sat in a handful of fabs on a handful of coastlines. Buyers now routinely want a qualified second source in another jurisdiction and will pay a modest premium for it. What the tailwind does not do is shorten qualification. A customer does not qualify a company, it qualifies a process running on a specific tool set in a specific building. Automotive parts must pass reliability testing that takes months of calendar time by definition, since it means running devices at elevated temperature and voltage and then measuring drift.

That is the strongest argument for the Powerchip relationship DURABLE over a home-grown process. A transferred process arrives with an established device library, known yield behaviour and, in principle, customers already running parts on it elsewhere. It is also why the partner list should be read carefully rather than as a book of orders. The Intel arrangement of 8 December 2025 was described by both sides as exploratory and explicitly non-binding REPORTED. The Qualcomm announcement of 20 February 2026 concerns automotive modules in India, and its link to Dholera output is not established in the public record REPORTED. The ROHM partnership of 22 December 2025 carried no published scope REPORTED. No volume supply agreement for wafers from this fab has been disclosed DURABLE.

Front end, back end, and why Sanand keeps getting confused with Dholera

A finished chip passes through two industrially distinct plants. The front end, the wafer fab, builds transistors and interconnect on bare silicon through several hundred sequential steps of deposition, lithography, etch, implant, anneal and polish. It is the capital-heavy, cleanroom-class, chemically intensive half, and it is what is being built at Dholera DURABLE. The back end thins and singulates finished wafers into die, attaches those die to a substrate or lead frame, connects them, moulds the package and tests the result. It is cheaper and much quicker to build.

Micron's Indian plant is a back-end assembly, test and packaging operation, and it is at Sanand, not Dholera DURABLE. The two are routinely conflated in secondary coverage, which creates a false impression of an integrated cluster in which a wafer made at one site is packaged at the other. Nothing in the record supports that flow, and it would be unusual: memory and logic packaging use different technologies, and wafers are among the easiest things in the chain to move, being light, dense in value and shippable in sealed carriers. Proximity within a state is a labour-market and supplier advantage, not a production linkage. Ten India Semiconductor Mission projects had been approved across six states by December 2025 DURABLE, but documentation on individual units varies enormously, and only those with a traceable approval are mapped here.

The compound semiconductor line is a different industry wearing the same name

The Union Cabinet approved a further Dholera unit on 5 May 2026, Crystal Matrix Limited, an integrated compound semiconductor facility rated at 72,000 square metres a year of Mini and Micro-LED display panels and 24,000 sets a year of RGB Mini and Micro-LED gallium nitride epitaxy wafers DURABLE. Silicon logic is built by patterning; compound semiconductor light emitters are built by growing. The value sits in metal-organic chemical vapour deposition, where layers a few atoms thick are grown with composition controlled precisely enough to set the wavelength of the emitted light.

The hard problems differ accordingly. Lattice mismatch between gallium nitride and its substrate generates dislocations that quench light output, so buffer layer engineering rather than lithographic resolution is the yield lever. Wavelength uniformity has no real analogue in a logic fab: a display cannot tolerate visible colour variation, so the usable fraction of an epitaxial wafer is set by how tightly composition holds across its diameter. Downstream, mass transfer, the business of placing millions of microscopic dies onto a panel backplane accurately and at speed, remains one of the unsolved cost problems of the display industry.

Gases, materials and tools: the layer that decides whether a fab runs

A wafer fab is as much a chemical plant as an electronics plant, and much of what it consumes cannot be trucked in from far away. Bulk nitrogen purges tools and keeps oxygen and moisture away from wafers between steps, in volumes large enough that fabs are normally built alongside a dedicated air separation unit rather than supplied by cylinder. INOX Air Products began construction in October 2025 of an electronic specialty gas facility at Dholera, budgeted at Rs 500 crore and including a 200 tonne per day air separation unit DURABLE. Linde is reported to be advancing plans for a Dholera oxygen, nitrogen and argon plant, on a single trade-press source and therefore weakly evidenced REPORTED. Fujifilm signed a memorandum with the Gujarat State Electronics Mission on 30 June 2026 to explore a semiconductor materials base REPORTED, which is exploratory language.

Electronic-grade supply is not ordinary industrial supply: purity is specified in parts per billion, and a contaminant at that level in a purge gas can quietly cost yield in ways that take months to trace. Photoresists ship cold, have shelf lives measured in months rather than years, and are matched to a specific exposure wavelength, making them a recurring logistics problem. Localising these layers is what ISM 2.0 targets DURABLE, and it is the slowest part of the ecosystem to build, because a materials supplier is worth nothing until it has been qualified into a customer's process.

On tools, ASML and Tata Electronics both announced a memorandum of understanding on 16 May 2026 naming the same 28 to 110 nanometre node set DURABLE. For that range the relevant equipment is deep ultraviolet, argon fluoride scanners for the tighter layers and krypton fluoride or i-line steppers for the rest, not the extreme ultraviolet systems associated with the leading edge. A memorandum is not a purchase order, and no valued equipment orders for this fab have been made public DURABLE. Tool delivery, hook-up and qualification is normally the longest pole in a fab schedule after the building itself, which makes that absence the most informative gap in the record.

What a technology transfer actually transfers

The Powerchip technology transfer agreement was reported complete on 26 September 2024 DURABLE, and DigiTimes reported in January 2025 that Powerchip expects more than NT twenty billion dollars, roughly 620 million US dollars, from consulting, transfer and training across the engagement REPORTED. A process transfer is not a set of documents. It is a recipe defined against particular tool models, chamber configurations and consumable sets, plus process control limits, an in-line metrology plan, the monitor structures used to catch drift, and the accumulated knowledge of what to do when a parameter moves. The norm is to copy the reference fab as exactly as practical, because small differences in tool generation or utility quality reappear as yield differences nobody can explain.

The human half is why staff went to Taiwan. Reporting in June 2025 described a couple of hundred people sent to Powerchip, in batches of around seventy-five covering equipment, yield, process technology and quality engineering REPORTED. Those four disciplines are the operating core of a fab, and yield engineering in particular is learned by exposure, since it consists of correlating electrical failures back through hundreds of steps to a physical cause. Powerchip's Eric Tang described transfers as typically introduced gradually, starting with more mature nodes REPORTED: the receiving team learns to run something forgiving before it is handed something tight.

The money: how ISM, ISM 2.0 and the Gujarat stack fit together

The central instrument is the commitment of half the project cost, formalised in the Fiscal Support Agreement of 5 March 2025 against a project valued at Rs 91,000 crore, roughly eleven billion US dollars DURABLE. Gujarat's Semiconductor Policy 2022-27, the first state semiconductor policy in India, adds 40 per cent of the capital assistance approved centrally, so the two stack rather than substitute DURABLE. The state policy also carries operating-cost items that matter more than they first appear: a 75 per cent land subsidy on the first 200 acres in Dholera Semicon City, water at Rs 12 per cubic metre for five years rising thereafter, a power subsidy of Rs 2 per unit for ten years with electricity duty exemption, and a 50 per cent capital subsidy on a desalination plant built within five years DURABLE. A fab is among the most utility-hungry industrial facilities in existence, so a decade of subsidised power changes the cost structure across the whole ramp.

The Ministry of Commerce and Industry then notified a special economic zone for Tata Semiconductor Manufacturing Private Limited at Dholera on or about 16 April 2026, covering 66.16 hectares DURABLE, which bears on duty treatment of imported equipment and on export procedure. ISM 2.0, announced in the Union Budget for 2026-27, shifts emphasis towards semiconductor equipment and materials manufacturing and full-stack Indian semiconductor intellectual property DURABLE. That is the right diagnosis of the first mission's gap. A country can host a fab and still import every gas purifier, quartz part, resist, valve and pump it consumes, in which case the trade balance improves far less than the headline capital figure implies. Whether the second mission changes that depends on scheme design not yet public.

The two dates that decide how this story reads

The first is commercial production, guided to the middle of 2028 by the Minister for Electronics and Information Technology on 17 July 2026 TARGET. That replaced a widely repeated expectation of a first chip in December 2026, which traces to ministerial statements rather than any company commitment DURABLE. No first silicon had been reported as of early August 2026 DURABLE. Two engineering facts explain much of the drift, and both are ordinary rather than scandalous. Fugro, Cengrs and Geo Dynamics were reported engaged in November 2025 to redesign the main fab foundations after soil testing showed the ground unsuitable REPORTED, a common finding on coastal alluvial land, where a structure that must hold vibration within nanometre-scale tolerances cannot be founded on whatever is there. The Malaysia-based firm IAQ Group was reported onboarded in June 2026 to design and install the cleanroom REPORTED. Fit-out precedes tool move-in, which precedes qualification, which precedes production, so a mid-2028 date and a mid-2026 cleanroom contract are consistent in a way a 2026 first chip never was.

The second date has never been published, and it is the more consequential: when 28 nanometre production actually begins. Bloomberg reported on 17 July 2026, and TrendForce corroborated on 20 July, that the fab will open mostly at 90 nanometres REPORTED. A Tata spokesperson responded that the plan had always been to start with 55 and 90 nanometres before introducing 28 REPORTED. Against that sits the Tata Sons chairman's own statement, in the annual report for the year ended March 2025, that the company had chosen to start its chip journey at the 28 nanometre node DURABLE. Both cannot fairly describe the same plan, and the discrepancy is not merely presentational. The distance between 90 and 28 nanometres is three process generations, roughly seven to eight years of industry development when those nodes were new, and it means extra mask layers, tighter lithography and a different customer set. Until a node roadmap with dates exists in public, the sober reading is that this is a 90 and 55 nanometre fab with a 28 nanometre ambition attached to it.