The answer desk

Is 90nm technology outdated?

Published 25 August 2026. Facts verified to 25 August 2026 unless dated otherwise.

No, and the question confuses two different things. Outdated means nobody buys it and nobody builds capacity for it. Non-leading-edge means the process is not the newest, which describes most of the chips in a car, an appliance, a charger or the power circuitry of an AI server. Analog, high-voltage and power management devices work better at older geometries and are often designed there deliberately. The fair criticism of 90nm is narrower: it addresses a smaller customer set than 28nm, and at Dholera that is a commercial constraint rather than a technical embarrassment.

The question, restated so it can be answered

Every time the Dholera fab is discussed in public, someone points out that 90 nanometres is a process from the early 2000s and treats that as the end of the argument. The observation is true and the conclusion does not follow, because the word outdated is doing work it has not earned. A technology is outdated when demand for it has gone and nobody is building new capacity to serve it. A technology is non-leading-edge when it simply is not the newest available. Those are different tests, and 90nm passes one and fails the other.

This page answers the definitional question first, then the commercial one, then the specific one about Dholera, which is the only place where a real criticism lives. Our mature nodes guide makes the strategic case for the whole 28 to 110nm window; this page is narrower and harder on the node itself.

What a node number does and does not measure

The first thing to retire is the idea that 90nm describes a measurement you could take with an instrument. In the earliest decades of scaling, the node name tracked a physical dimension reasonably closely. As the industry moved through successive generations, the number became a label for a whole process generation, covering transistor architecture, interconnect pitch, the number of mask layers and the design rules that come with them, rather than any single feature you could point at on a die. By the time the industry reached the geometries that dominate marketing today, the relationship between the name and any physical measurement had become loose enough that comparing numbers across manufacturers tells you very little on its own.

What the name reliably indicates is the toolset and the design discipline required. At 110nm and 90nm, most layers can be patterned using deep ultraviolet steppers at the 248 nanometre krypton fluoride wavelength, with argon fluoride at 193 nanometres reserved for the tightest features. At 28nm, critical layers require immersion lithography, where a water film between the final lens element and the wafer raises the effective numerical aperture, which brings more expensive tools, longer qualification and defect mechanisms involving watermarks and bubbles that simply do not exist at the older node. Our lithography explainer works through the physics. The practical consequence is that node choice is a statement about capital, mask count, cycle time and yield learning far more than about performance bragging rights.

What 90nm silicon actually does in 2026

The products that live at 90nm and its neighbours are unglamorous and they are everywhere. Power management integrated circuits, which convert and regulate voltage inside every powered device, are built there, as are the display driver chips that turn a video signal into the row and column drive a panel needs. So are the microcontrollers that run body electronics in a car, the control board of an appliance and the sequencing of an industrial machine, along with analog front ends, amplifiers, comparators and the interface circuits that sit between a sensor and a processor. Discrete and high-voltage devices belong to the same territory, because the ability to stand off voltage matters far more in those parts than switching density does. Power management and microcontrollers are the two product families named on Tata Electronics' own foundry material for the Dholera plant DURABLE.

There is a physical reason these parts sit where they do rather than at the newest available node. Analog performance depends on device matching, on controlled parasitics, and on the availability of thick gate oxides and high-voltage structures. Shrinking a transistor improves digital density and switching energy, and it does very little for a precision current mirror or for an output stage that has to survive tens of volts. Passive components, resistors, capacitors and inductors, do not scale with the transistor at all, so an analog-heavy die at an advanced node ends up as an expensive piece of silicon that is mostly not transistors. Designers do not choose mature nodes because they cannot afford better. They choose them because the older process has the devices the circuit needs.

Two further constraints keep this demand where it is. Automotive and industrial customers qualify a part once and then expect supply for a decade or longer, which pushes them towards processes that will not be retired mid-programme. And the cost of a mask set rises steeply with node, so a design selling in modest volumes is often only viable at a mature geometry. Both effects are structural rather than cyclical, which is why the mature band has outlived every prediction of its demise. Our product map on the fab desk takes the catalogue further.

The economics of a line that has already been paid for

The commercial case is separate from the engineering one and, for an operator, more decisive. Depreciation dominates fab economics. A tool set that has been on the floor for years and is written down carries a fraction of the fixed cost per wafer of a newly installed advanced line, which is why fully depreciated mature capacity can price aggressively and still make money. Yields on a process with two decades of production history sit high and stable, so scrap is low and cycle time is predictable. Design enablement is mature, meaning the libraries, models and intellectual property blocks customers need already exist and have been silicon-proven many times over.

The obvious question follows: if mature nodes are so comfortable, why does anyone build new capacity for them rather than simply running the old fabs? Because demand at these geometries has grown with electrification and industrial automation while some legacy capacity has been retired, and because much of the surviving legacy capacity is on 200mm wafers, which carries a cost disadvantage against a modern 300mm line running the same design rules. That is the arbitrage a new mature-node fab is built to capture, and our wafer economics page works through the arithmetic behind it.

The test that decides whether a node is obsolete

Rather than argue about the word, apply an observable test: is anyone spending capital to build new capacity at this class of node? The answer, repeatedly, is yes, and one example is directly relevant to Dholera. Powerchip Semiconductor Manufacturing Corporation, the Taiwanese technology partner for the Dholera fab, announced with SBI Holdings on 31 October 2023 a Japanese joint venture, JSMC, to build a 300mm foundry in the Second Northern Sendai Central Industrial Park in Ohira Village, Miyagi Prefecture, producing 28, 40 and 55 nanometre chips for automotive and industrial customers at a planned 40,000 wafers a month, as reported by DigiTimes on the day of the announcement and set out in SBI Holdings' own release REPORTED.

A brand-new 300mm fab in a high-cost economy, dedicated to nodes that were current two decades ago, is not the behaviour of an industry writing those nodes off. India's own approved portfolio points the same way: the plants sanctioned under the India Semiconductor Mission serve mature and compound processes rather than advanced logic, and they were sanctioned because that is where the demand a new entrant can win actually sits.

Where 90nm genuinely is a limitation

Honesty requires the other column, and it is not empty. Compared with 28nm, a 90nm process delivers lower digital density and higher switching energy, which rules it out for anything where compute per watt is the product. Many modern embedded and connectivity parts, including the microcontrollers with substantial digital content that the automotive industry has been standardising on, target 28nm and below, so a fab confined to the older band cannot bid for that work. Embedded non-volatile memory options, radio-frequency performance and the availability of current design intellectual property all thin out as you go older.

The commercial exposure matters as much as the technical one. Global mature-node capacity has been expanding, with a great deal of new supply aimed at exactly the 90 to 55 nanometre band, and a new entrant competing there is competing on price against lines that are fully depreciated. Subsidy improves the return on invested capital and does nothing for the operating margin on a wafer. That is the real criticism of a mature-node strategy, and it has nothing to do with the node being old.

There is a customer-side version of the same problem that gets less attention and matters more. Qualifying a new supplier is expensive for the buyer, not only for the seller. An automotive or industrial customer moving a part to a new fab pays for silicon validation, reliability testing across temperature and voltage, production part approval and often a re-qualification of the finished assembly, and the process runs for quarters rather than weeks. A buyer will absorb that cost for one of three reasons: price, supply security, or because the incumbent cannot supply. A new entrant at a widely available node is asking a customer to spend money to change nothing except the name on the box, which is why the first qualifications at any new fab are usually won on second-sourcing and diversification rather than on the process itself. That is a sales problem and a patience problem, and it is the one a subsidy cannot solve.

What this means for the Dholera fab specifically

The node question at Dholera is a live dispute in the public record rather than a settled fact, and it deserves stating precisely. Bloomberg reported on 17 July 2026, carried in India by Outlook Business, that the fab will open mostly at 90nm rather than the 28nm promised in 2024, with commercial production in mid-2028, and TrendForce carried the same finding on 20 July 2026 REPORTED. A Tata Electronics spokesperson responded that the plan has always been to start with 55nm and 90nm before introducing 28nm, and PSMC's spokesperson Eric Tang said technology transfers are typically introduced gradually, starting with more mature nodes REPORTED. Against those statements sits the Tata Sons chairman's written line in the annual report for the year ended March 2025 that the group had chosen to start its chip journey at the 28nm node. Both accounts cannot describe the same plan, the public record does not resolve which is operative, and our node investigation keeps the contradiction on the page rather than smoothing it away.

The official specification has not changed. The approved node range is 28 to 110nm at up to 50,000 wafer starts per month on 300mm wafers DURABLE, and the memorandum of understanding announced on 16 May 2026 by both ASML and Tata Electronics names 28, 40, 55, 90 and 110nm REPORTED, which is consistent with a toolset intended to cover the whole span rather than one point on it. Commercial production is guided to mid-2028 by Union electronics and IT minister Ashwini Vaishnaw, speaking on 17 July 2026 TARGET, and no first-silicon date has been published by anyone.

So the fair criticism of opening mostly at 90nm is not that the technology is obsolete. It is that the addressable customer set in the first years is narrower than the one a 28nm-capable line could bid for, which affects how quickly capacity fills and therefore when the plant covers its fixed costs. That is a commercial risk, it is measurable, and it will show up in customer announcements rather than in commentary.

Why starting old is the engineering choice, not the consolation prize

There is a further reason a first fab opens at the older end that has nothing to do with ambition. A new plant has to solve two problems at once: making a process work, and making a building work. Facility stability means vibration control, temperature and humidity held within fractions of a unit, airborne molecular contamination, ultrapure water quality, chemical delivery consistency and power quality, and every one of those takes months to characterise in a building that has never run wafers.

A mature process tolerates wider excursions in all of them. When a lot fails, the engineering team can attribute the failure, because the process itself is not simultaneously marginal. Attempting a tight process in an untuned building means never knowing which one caused a given loss, and that is how first fabs stall. Starting at 90nm buys attributable failures, which is the most valuable thing a new manufacturing organisation can own. The partnership file traces how that learning is meant to arrive through the technology transfer.

How this desk will score it

Three disclosures would turn this from an argument into a record. A dated company statement specifying the node mix at production start, which would end the contradiction. Valued equipment purchase orders, since a tool set reveals capability more honestly than any announcement, and none are public as of 25 August 2026 REPORTED. And named customer qualifications, which reveal which nodes have demand behind them, because a fab without qualified customers is an expensive building whatever number is printed on its process. Construction meanwhile is reported at about 50 percent civil progress as of mid-2026 with cleanroom fit-out under way REPORTED, which places all three of those disclosures ahead rather than behind us.