The answer desk

What is PSMC?

Published 25 August 2026. Facts verified to 25 August 2026 unless dated otherwise.

PSMC is Powerchip Semiconductor Manufacturing Corporation, a Taiwanese wafer foundry founded in December 1994 and based in Hsinchu Science Park. Its own company profile describes two 200mm and four 300mm fabs and about 8,100 employees, with a business built on memory, customised logic and discrete devices rather than leading-edge processors. At Dholera it is the technology partner, not an owner: the technology transfer agreement with Tata Electronics was completed on 26 September 2024, and nothing in the public record describes PSMC taking an equity stake in the fab.

The company, in one paragraph

PSMC stands for Powerchip Semiconductor Manufacturing Corporation, a wafer foundry headquartered in the Hsinchu Science Park in Taiwan. Its own company profile describes a company founded in December 1994 to help build Taiwan's DRAM industry, operating two 200mm and four 300mm wafer fabs with about 8,100 employees, and selling foundry services across memory, customised logic and discrete devices under what it calls an open foundry model, per PSMC's published company profile as checked on 25 August 2026 DURABLE. The company is listed in Taiwan, and Bloomberg's company profile carries it under the ticker 6770. For readers who know the industry only through its most famous names, the useful shorthand is that PSMC is a specialty and mature-node foundry rather than a leading-edge one, and that this is a deliberate market position rather than a failure to keep up.

This desk does not print a market-share rank for PSMC, because rankings of foundries vary by whether memory, specialty and logic revenue are counted together, and no dated table in the public record supports a single number. What can be stated without qualification is the shape of the business: high-volume manufacturing at geometries the industry calls mature, sold both as capacity and, increasingly, as process technology exported to partners who want to build their own fabs.

Why the memory heritage matters more than it looks

A company founded to make DRAM carries a particular kind of manufacturing culture, and it is relevant to what India is buying. Memory production is among the most repetitive, highest-volume and most cost-disciplined forms of wafer manufacturing. A memory house lives or dies on yield per wafer and on cycle time, because the product is a commodity and the price is set by the market rather than by the maker. That environment produces engineering organisations obsessed with defect reduction, tool uptime and statistical process control, since those are the only levers available.

Foundry logic work is a different discipline. The customer brings the design, the fab has to hit specifications it did not set, and the deliverable includes a design enablement package rather than only a part. PSMC's position spans both, which is precisely why its process library sits in the mature range where memory and specialty logic overlap. The relevance to Dholera is direct: the Indian plant is a 300mm mature-node line whose commercial problem will be yield and utilisation rather than architectural novelty, and yield discipline is the transferable asset. What does not transfer automatically is customer-facing foundry service culture, which a licensee has to build itself.

The Japan precedent, and what it reveals about the model

PSMC has done this before, in a different structure, and the comparison is the most informative thing an outsider can look at. On 31 October 2023, PSMC and SBI Holdings announced JSMC, a joint venture to build a 300mm foundry in the Second Northern Sendai Central Industrial Park in Ohira Village, Kurokawa District, Miyagi Prefecture, aimed at 28, 40 and 55 nanometre production for automotive and industrial customers with a planned capacity of about 40,000 wafers a month, reported by DigiTimes on 31 October 2023 and set out in SBI Holdings' own announcement of the same date REPORTED. Trade coverage at the time put the project in the multi-billion dollar range REPORTED, and this record does not print a single figure for it because the reported values were pre-construction estimates rather than committed capital.

Two features of that deal matter for reading the Indian one. First, PSMC took a joint venture position in Japan, sharing in the plant rather than only advising it. Second, the node target in Japan is 28 to 55 nanometres, the same band that sits at the more demanding end of Dholera's approved range, which tells you where PSMC believes its exportable process library is strongest. A company that builds the same class of fab twice on two continents is running a strategy, not doing a favour.

The Japanese venture is also the nearest thing available to a schedule benchmark. Both projects involve the same licensor, the same wafer size and an overlapping node range, so the pace at which JSMC moves from announcement to construction to tool move-in is a reasonable, if imperfect, yardstick for how long PSMC's own engineering organisation takes to stand up a line outside Taiwan. The differences are real and cut both ways: Japan has a deep domestic supplier base, a trained semiconductor workforce and construction contractors who have built fabs before, while India is assembling those layers alongside the building. A reader watching one project learns something about the other, provided the comparison is made with those asymmetries stated rather than assumed away.

What PSMC is actually contracted to do at Dholera

The Indian engagement is structured differently, and the difference is the most important fact on this page. Tata Electronics and PSMC completed their technology transfer agreement on 26 September 2024 DURABLE. Tata Electronics owns and builds the plant, carries the Rs 91,000 crore commitment approved by the Union Cabinet on 29 February 2024, and signed the Fiscal Support Agreement with the Government of India on 5 March 2025 DURABLE. PSMC supplies process technology, the design enablement that makes a process sellable, and the operating know-how that cannot be bought as a product. Our partnership file takes the division of labour apart in detail, and the Tata Electronics file carries the corporate record on the other side of the table.

Nothing in the public record describes PSMC taking an equity position in the Dholera fab. What has been disclosed is compensation for consulting, technology transfer and training: DigiTimes reported in January 2025 that PSMC expects more than NT$20 billion, roughly 620 million US dollars, from the engagement across its lifecycle REPORTED. Set against a project capitalised at Rs 91,000 crore, that is a service annuity rather than a bet on output, and the distinction has consequences a reader should hold in view. A licensor paid for effort and elapsed time is compensated whether or not yield arrives on schedule. A licensor holding equity is compensated for what the plant produces. Nothing in the record suggests PSMC has behaved in any way inconsistently with the agreement, and this desk is describing contract shape rather than conduct.

The gradual node doctrine, stated by PSMC itself

PSMC has put its transfer philosophy on the record, and it is the reason the Dholera node dispute is less mysterious than it looks. PSMC's spokesperson Eric Tang said that technology transfers are typically introduced gradually, starting with more mature nodes REPORTED. That statement is consistent with standard industrial practice and with what the physics demands: a new fab has to characterise its own water, air, gas purity, vibration environment and handling before a tight process can be judged fairly, and a forgiving flow makes failures attributable.

It is also the statement that sits closest to the contradiction in the record. Bloomberg reported on 17 July 2026 that the Dholera fab will open mostly at 90nm rather than 28nm, with commercial production in mid-2028, corroborated by TrendForce on 20 July 2026 REPORTED, while the Tata Sons chairman's annual report for the year ended March 2025 described starting the chip journey at 28nm. The memorandum of understanding announced on 16 May 2026 by both ASML and Tata Electronics names 28, 40, 55, 90 and 110nm REPORTED, which is a toolset consistent with a phased introduction across the range. Our node investigation holds the unresolved version, and the ASML file carries the equipment side.

What PSMC gains, stated plainly

Partnership coverage tends to describe technology transfer as generosity or as a strategic gift between nations. The commercial logic is simpler. Exporting a process that a foundry has already amortised costs little more than the engineers it seconds, and it converts an asset that was fully paid for by earlier production into fee income in a new geography. For a mature-node foundry with engineering capacity to spare, that is an attractive line of business with no capital exposure attached.

There is a strategic layer as well. Taiwanese manufacturers have generally been willing to place mature-node capability abroad while keeping the leading edge at home, which is why mature-node partnerships travel and advanced ones do not. Placing process technology in India also creates a customer relationship and a potential second source for customers who want geographic diversification, without PSMC funding the fab that provides it.

What PSMC does not obtain, on the public record, is participation in the plant's upside. That is the honest counterweight to every optimistic reading of the relationship, and it is why this record watches delivery rather than sentiment.

What PSMC is not, and why the distinction keeps mattering

Most of the confusion around this company in Indian coverage comes from claims about what PSMC is doing that are simply outside its role. Five corrections are worth stating flatly.

• It is not the owner or operator of the Dholera fab. Tata Electronics owns the plant, carries the capital, signs the fiscal agreement with the Government of India, employs the workforce and answers for the schedule. A technology partner supplies method. It does not run the site or control the construction programme, so accountability for delivery sits with the owner rather than the licensor.
• It is not an equipment supplier. Lithography, deposition, etch and metrology tools come from the toolmakers, which is why the memorandum of understanding announced on 16 May 2026 involves ASML and not PSMC. A process recipe tells a fab how to use a scanner. It does not deliver one.
• It is not a leading-edge foundry, and the Indian project was never designed to make it one. The approved node range of 28 to 110nm is deep ultraviolet territory, so nothing in the plan requires extreme ultraviolet lithography or the ecosystem that surrounds it.
• It is not the recipient of India's fiscal support. Support under the India Semiconductor Mission is committed to the approved project company as a share of eligible project cost, and PSMC's compensation is a commercial payment from its counterparty rather than public money.
• It is not interchangeable with Taiwan's other foundries. The name is easily confused with the island's larger and better known manufacturers, and the party to this agreement is Powerchip Semiconductor Manufacturing Corporation specifically. Statements made by other Taiwanese companies about their own plans describe their plans, not this project.

Those five corrections matter because they decide who to hold to what. A reader who understands that the licensor sells method and the owner sells output will read every future announcement about the Dholera fab more accurately than one who treats the two companies as a single entity with shared responsibility.

What is not public

Five things a serious analyst would want are absent from the record as of 25 August 2026, and pretending otherwise would be the easiest way to mislead a reader.

• The contract term and milestone structure. Whether payments are tied to yield, to wafer output, to elapsed time or to defined technical acceptance is unknown.
• Any yield guarantee. Whether PSMC carries performance obligations, and what remedies exist if targets are missed, has not been disclosed.
• Seconded headcount and duration. The Economic Times reported in June 2025 that Tata had sent a couple of hundred people to PSMC in Taiwan, in batches of around seventy-five across equipment, yield, process technology and quality engineering REPORTED, but the reverse flow of PSMC staff to Dholera and how long they stay is not public.
• Node-by-node schedule. No dated plan for when each node in the 28 to 110nm range enters production has been published by either party.
• Whether the transferred process design kit is licensed for third-party use. This decides whether Indian design houses can target the Dholera process directly, and it has not been addressed publicly.

Each of those is a normal commercial confidentiality rather than evidence of a problem. They are listed because a reader forming a view about ramp risk should know which parts of the picture are genuinely dark.

How to read PSMC news from here

Three kinds of PSMC disclosure would carry real information for the Indian project. Anything about the pace of the JSMC build in Miyagi, because a licensor's own construction absorbs the same senior engineers who supervise transfers elsewhere. Anything about PSMC's utilisation and pricing in Taiwan, because a licensor with idle capacity has different incentives from one running full. And any statement expanding, narrowing or dating the Indian engagement, particularly on the node sequence.

The frame that survives scrutiny is a straightforward commercial one: Tata is paying to compress a learning curve, and PSMC is monetising a process library it finished paying for years ago. That trade is rational on both sides and it guarantees nothing. Its result will be visible in evidence neither party controls, which is the first wafers actually running through the line and what happens to yield in the quarters that follow. Neither is public, both will be, and this record will carry them with their dates. Our mature nodes guide explains why the segment PSMC teaches is the right syllabus for a first fab even so.