The answer desk

Which chips will the Dholera fab make?

Published 25 August 2026. Facts verified to 25 August 2026 unless dated otherwise.

Tata Electronics' own foundry material, checked on 25 August 2026, names four product families for the Dholera fab: power management integrated circuits, microcontrollers, display drivers and high performance computing logic, built on 300mm wafers across 28 to 110nm technologies at a stated capacity of 50,000 wafers a month. Bloomberg reported on 17 July 2026 that the plant will open mostly at 90nm rather than 28nm, which narrows the opening product set toward power management and analog parts. No customer, no product mix and no wafer allocation has been announced.

What the company itself publishes

The most reliable answer to this question is not an analyst forecast. It is the manufacturer's own foundry material, which this desk checked directly on 25 August 2026. Tata Electronics describes the Dholera plant as a 300mm fab built in partnership with Powerchip Semiconductor Manufacturing Corporation of Taiwan, running technologies from 28nm to 110nm, with a total monthly capacity of 50,000 wafers. Four product categories are named: power management integrated circuits, microcontrollers, display drivers, and high performance computing logic. Four application markets are named alongside them: automotive, computing and data storage, wireless communication, and artificial intelligence. DURABLE

That is the whole of the official product answer. Everything else in circulation is either an inference from those four categories, a repetition of the Union Cabinet approval language of 29 February 2024, or an invention. This record separates the three, because the difference between a published product category and an announced product is the difference between a factory's brochure and its order book, and only one of those tells you what will actually come out of the door.

It is worth being precise about what a product category means on a foundry page. A foundry does not design chips. It sells manufacturing capacity to companies that design chips, and it advertises the process technologies it can offer them along with the kinds of devices those processes suit. So the correct reading of the four categories is not that Tata Electronics will design and sell power management chips. It is that the Dholera fab intends to offer process technology suitable for customers who design power management chips, microcontrollers, display drivers and certain classes of logic, and that it will fabricate their designs to order.

The four families, and what each one actually is

Each of the named categories is a different business with a different customer base, and the differences matter more than the shared label of semiconductor.

• Power management integrated circuits. These regulate, convert and distribute electrical power inside a device: stepping a battery voltage down to what a processor core needs, managing charging, sequencing rails so a system powers up in the right order. They are heavily analog, they tolerate older geometries well, and their performance depends more on device characteristics, layout discipline and process maturity than on how small the transistors are. This is the classic mature node product family, and it is the one most consistent with a fab opening at 90nm.
• Microcontrollers. A microcontroller is a small processor with memory and peripherals on the same die, used to run washing machines, motor controllers, meters, body electronics in cars and thousands of embedded functions. Microcontrollers span a very wide node range. In general industry practice, simple parts are still made at 130nm and above, automotive grade parts with embedded flash memory have clustered in the 90nm to 40nm range, and the most demanding automotive families have moved to 28nm and below. Embedded non-volatile memory is the complicating factor, because it is a process option a fab either has qualified or does not, and no public statement establishes which embedded memory options the Dholera process will carry.
• Display drivers. A display driver integrated circuit converts an image signal into the row and column voltages that actually drive a panel's pixels. It is a high volume, price sensitive, mature node product, usually made with high voltage device options, and it is the product family that has kept a large share of the world's 90nm and 110nm capacity loaded for two decades. The engineering is covered on our display driver page.
• High performance computing logic. This is the phrase that needs the most care. At 28nm and above, high performance computing logic does not mean the leading edge accelerators that dominate current coverage of artificial intelligence, which are fabricated at nodes several generations finer than anything in the Dholera range. What it can honestly mean at these nodes is companion and peripheral silicon inside computing systems: interface and bridge chips, controllers, management and telemetry parts, and the power delivery devices that surround a processor. The company lists the category. It has not published a product, a customer or a specification behind it, and this record does not fill that gap with a guess.

The node dispute changes the answer to this question

The product set and the process node are the same question asked twice, which is why the unresolved node record sits directly underneath any honest product answer. Bloomberg reported on 17 July 2026 that the Dholera fab will open mostly on the 90nm process node rather than the 28nm publicly presented in 2024, with commercial production expected in mid-2028. TrendForce carried the finding independently on 20 July 2026, naming ASML as the equipment supplier for the 300mm plant. REPORTED

A Tata Electronics spokesperson responded that the plan had always been to start with 55nm and 90nm before introducing 28nm, and that 28nm would be a key part of the offering. Powerchip's spokesperson Eric Tang described technology transfers as typically introduced gradually, starting with more mature nodes. Against those statements sits the Tata Sons annual report for the year ended March 2025, in which chairman N Chandrasekaran wrote that the group had chosen to start its chip journey at the 28nm node. REPORTED Both characterisations cannot describe the same plan. This desk does not resolve the contradiction, because the public record does not resolve it; the full evidence trail is set out in our node question investigation.

For a reader who only wants to know what the fab will make, the practical consequence is narrow and specific. If the line opens mostly at 90nm, the product set at opening leans heavily toward power management, analog, high voltage devices and display drivers, with simpler microcontrollers plausible depending on which embedded memory options are qualified. The 28nm work, and with it the more demanding automotive microcontrollers and any logic worth the name, arrives later and as a separate qualification exercise. The official 28 to 110nm range remains the company's stated envelope. The reporting says the envelope will be filled from the coarse end first.

What 90nm and 110nm can and cannot do

Node names have been marketing labels rather than physical dimensions for two decades, but at these generations the correspondence with real device behaviour is still reasonably direct. A 90nm process, introduced commercially in the early to mid 2000s, gives a designer transistors that switch fast enough for embedded control, analog blocks that behave predictably, mature high voltage and non-volatile options, comparatively few mask layers, and a defect learning curve that a new fab organisation can realistically climb. What it does not give is transistor density or power efficiency anywhere near what modern application processors, radios or accelerators require.

The market consequence is that a 90nm line is not competing for the products that generate technology headlines. It is competing for the enormous, unglamorous, price disciplined volume that sits underneath them: the regulator on every board, the driver behind every panel, the controller in every appliance and motor. That demand is durable, and it is the subject of our mature node economics guide and of the separate answer on whether 90nm is outdated. The short version is that outdated and non leading edge are different accusations, and only one of them is true here.

The constraint that a 90nm start does impose is competitive rather than technical. Mature node capacity is not scarce worldwide. A new entrant at 90nm is selling into a market with incumbent foundries whose lines are long since depreciated, whose yields are settled, and whose customer qualifications are already in place. Winning volume there is a question of price, service, qualification speed and, in India's case, the pull of customers who want domestic supply. None of those advantages depend on the node, which is why the opening node matters less for viability than it does for prestige.

What the ASML memorandum implies about the toolset

The equipment relationship is the other public document that constrains the product answer. ASML and Tata Electronics announced a lithography memorandum of understanding on 16 May 2026, published by both companies' newsrooms, naming the 28, 40, 55, 90 and 110nm nodes. REPORTED No tool orders, values, quantities or delivery schedules have been published by either party.

Read as a specification rather than as publicity, that node list is informative in one particular way: nothing in it requires extreme ultraviolet lithography. The whole range sits in deep ultraviolet territory, printable with i-line, krypton fluoride and argon fluoride exposure, with immersion argon fluoride needed only at the 28nm end. A fab whose entire published node range avoids the industry's most rationed and most export controlled tool class is a fab with a comparatively assembleable equipment fleet, which is a point in the project's favour and one that coverage treating any ASML mention as a proxy for advanced capability tends to miss. The distinction is set out on our lithography comparison page.

It also means the tool list itself will not settle the product question until orders are public. Mature node fleets are assembled from a mix of new and refurbished platforms, bought through channels that generate few headline announcements, which is one plausible and undramatic explanation for the absence of any publicly valued equipment purchase order for Dholera as of 25 August 2026. REPORTED

What has not been announced, stated plainly

The honest half of this answer is the list of things nobody has published, and it is longer than the list of things they have.

• No customers. Not one design win, foundry agreement or qualification programme has been announced for the Dholera fab by either party as of 25 August 2026. Customer announcements are the single most load bearing future signal for this project, and their absence at this stage of construction is normal rather than alarming.
• No product mix. How the 50,000 wafers a month divides between power management, microcontrollers, display drivers and logic is unpublished, and a foundry's mix typically shifts with demand rather than being fixed in advance.
• No process design kit release. A foundry becomes usable to designers when its process design kit is available to them, and no PDK release, version or design enablement partner has been announced for the Dholera process.
• No qualified device options. Whether the process carries embedded flash, high voltage extensions, bipolar CMOS DMOS options or automotive qualification is unstated, and each of those decides whole product families.
• No opening capacity. The 50,000 wafers a month figure is a design ceiling, not a start-up rate. Fabs install and qualify tools in sets and load them progressively. TARGET

How to read the artificial intelligence framing

Because artificial intelligence appears among the application markets named on the company's own page, the claim that the Dholera fab will make AI chips circulates widely. The precise version is worth stating, since the imprecise version is doing commercial work for people selling other things.

Accelerators used to train and run large models are fabricated at leading edge nodes, with advanced packaging and high bandwidth memory attached, and nothing in India's approved project portfolio addresses that combination. What a mature node fab genuinely supplies into computing and AI systems is the surrounding silicon: power delivery and regulation for high current processors, board management and control functions, interface devices, and the display and sensor parts of the systems those chips sit inside. That is real participation in the value chain and it is worth stating without inflation. It is not the same claim as making the accelerator, and any page that blurs the two should be read carefully for what else it is blurring.

What would settle the product question

Four observable events would convert this answer from an inference into a record, and this desk watches for each.

• A dated company statement giving the node mix and product portfolio at production start, rather than a spokesperson's characterisation of intent.
• A process design kit release or a named design enablement partnership, which reveals exactly which device options the process supports.
• A customer qualification or foundry agreement announcement, which reveals which products have demand behind them rather than capability.
• Valued equipment purchase orders, which reveal capability directly, since a fleet without immersion lithography cannot make 28nm parts whatever the brochure says.

Until one of those arrives, the position at the top of this page stands as the whole of the sourced answer: four product families named by the manufacturer, a 28 to 110nm envelope, 300mm wafers, a stated ceiling of 50,000 wafers a month, an opening reported to sit mostly at 90nm, and a customer list that does not yet exist in public. The running corporate record, including every revision to the product language on the company's own material, is kept on our Tata Electronics file.