Guide
Semiconductor Companies in India
Published 25 August 2026. Facts verified to 25 August 2026 unless dated otherwise.
A register, not a ranking: every company below appears because a government document or a company newsroom puts it there, and the inclusion rule is stated before the names are.
What this page establishes
- The rule this register runs on
- Layer one: wafer fabrication
- Layer two: assembly, test and packaging
- Layer three: the technology partners named in approvals
- Layer four: equipment, materials and gases
Companies in Indian semiconductors sort into five layers: wafer fabrication, assembly and test, the foreign technology partners named in approvals, equipment and materials, and design. Twelve manufacturing units are approved with cumulative investment over Rs 1.64 lakh crore, per the Union Cabinet release of 15 July 2026.
The rule this register runs on
Lists of Indian semiconductor companies circulate widely and most of them mix four incompatible things: firms with approved manufacturing projects, firms that signed a memorandum at an investment summit, firms that sell chips in India without making anything here, and firms that were named in a rumour and never corrected it. A reader cannot tell those apart from the list, which is what makes the list worthless.
The rule here is narrow and stated up front. A company appears if a government approval document, a company newsroom or a named tier-one report places it in the Indian semiconductor chain, and the entry says which of those it is. Nothing appears on the strength of an unsourced claim, a market report or a job posting. Where a company's role is at memorandum stage, the entry says so rather than promoting it to a commitment. There are no rankings, no best-of ordering and no assessment of any company's merit: entries are grouped by what they do and ordered by approved investment inside each group.
The consequence is that this register is shorter than most. That is the intended outcome. A short list of verifiable names is more useful than a long list you have to re-verify yourself.
Layer one: wafer fabrication
Four organisations fabricate wafers in India or are approved to. Tata Electronics is building the country's first commercial silicon wafer fab at Dholera, approved by the Union Cabinet on 29 February 2024 at Rs 91,526 crore, with a Fiscal Support Agreement signed on 5 March 2025 committing fifty percent central support, designed for up to 50,000 wafer starts per month on 300mm wafers in technology partnership with PSMC of Taiwan DURABLE. Its corporate record sits in the Tata Electronics company file.
SiCSem Private Limited is approved for a silicon carbide fab in Odisha at Rs 2,066 crore, in technology partnership with Clas-SiC Wafer Fab for the fab and Continental Device India for packaging, at a stated 5,000 wafers per month with packaging capacity of 8 million units per month, per the government annexure of 1 April 2026 DURABLE. Crystal Matrix Limited was approved by the Cabinet on 5 May 2026 for an integrated compound semiconductor fabrication and ATMP facility at Dholera making mini and micro-LED display modules, including gallium nitride foundry services with epitaxy on six-inch wafers DURABLE. Semi-Conductor Laboratory at Mohali is the one that already runs: the 1 April 2026 reply records 149 chips taped out at 180nm there by Indian institutions.
Everything else in Indian semiconductors, however large the investment, is not a wafer fab. That distinction does more work than any other on this page.
Layer two: assembly, test and packaging
Nine approved units make up the back-end layer, and each of the following figures is the value stated in the government annexure of 1 April 2026 or the Cabinet release of 5 May 2026.
- Tata Electronics, Jagiroad, Assam: Rs 27,120 crore, indigenous packaging technologies, 48 million units per day.
- Micron Technology, Sanand, Gujarat: Rs 22,516 crore, assembly and test for DRAM and NAND products, about 14 million units per week. Commercial production has commenced DURABLE.
- CG Power and Industrial Solutions, Sanand, Gujarat: Rs 7,584 crore, a joint venture with Renesas Electronics America and STARS Microelectronics of Thailand, about 15.07 million units per day.
- Vama Sundari Investments (Delhi), Jewar, Uttar Pradesh: Rs 3,706 crore for display driver integrated circuits using gold bump technology with chip probing and die processing, a joint venture with Foxconn India and reported as the HCL group's vehicle for it, about 20,000 wafers per month and 36 million chips per month.
- Kaynes Technology India, Sanand, Gujarat: Rs 3,307 crore, wire bond interconnect and substrate-based packages, over 6.33 million chips per day. Commercial production has commenced.
- Suchi Semicon, Surat, Gujarat: approved 5 May 2026 as an outsourced assembly and test facility for discrete semiconductors, 1,033.20 million chips per year. The release gives no separate investment value for this unit: it carries a combined figure of about Rs 3,936 crore with Crystal Matrix.
- 3D Glass Solutions, Odisha: Rs 1,943 crore for flip chip ball grid array assembly, radio frequency and antenna-in-package products, glass interposers and three-dimensional heterogeneous integration modules.
- Advanced System in Package Technologies, Andhra Pradesh: Rs 480 crore with APACT of South Korea, about 96 million units per year.
- Continental Device India, Punjab: Rs 117 crore expansion for high-power discrete devices including MOSFETs, IGBTs, Schottky bypass diodes and transistors in both silicon and silicon carbide.
Two names in that list carry the only commercial production in the approved portfolio, which is why the back-end layer, not the fab, is currently the part of Indian semiconductor manufacturing that ships.
Layer three: the technology partners named in approvals
Indian projects are being built on licensed process technology, and the partners are named in the government's own documents rather than inferred. PSMC of Taiwan is the fab technology partner at Dholera. Renesas Electronics of Japan and STARS Microelectronics of Thailand supply the technology for the CG Power venture, with Renesas Electronics America as a joint venture partner. ISO Technology Sdn Bhd and AOI Electronics supply Kaynes. Hon Hai of Taiwan supplies the Jewar display driver unit, with Foxconn India as joint venture partner. APACT of South Korea partners the Andhra Pradesh unit, and Clas-SiC Wafer Fab partners SiCSem.
These names matter more than they look. A technology partner is the mechanism by which a country without process knowledge acquires it, and the identity of the partner tells you what the plant will actually be capable of running on day one. It also tells you where the risk sits: a transfer relationship can slow, narrow or be renegotiated, and none of these agreements is public in its commercial detail.
What a transfer involves in practice is rarely spelled out in coverage. The partner supplies a qualified process flow, the recipes that make it repeatable, the tool set the flow assumes, and usually the engineers who have run it before, working alongside the local team through installation, qualification and the first production lots. The receiving company supplies the capital, the building and the workforce that has to own the process afterwards. The measure of a good transfer is not the signing ceremony but how quickly the receiving plant can change something in the flow without asking permission, and that is a milestone no press release announces.
Layer four: equipment, materials and gases
This is the thinnest layer in India and the register reflects that honestly. ASML and Tata Electronics both announced a memorandum of understanding on 16 May 2026 naming nodes of 28, 40, 55, 90 and 110nm REPORTED, which is the clearest public link between an Indian fab and a lithography supplier this record has verified, and it is a memorandum rather than a purchase order. The ASML file keeps that distinction visible.
INOX Air Products has a reported Rs 500 crore electronic specialty gas hub with a 200 tonnes per day air separation unit at Dholera to serve the fab ecosystem REPORTED, detailed in its own file. Fujifilm India signed a memorandum with the Gujarat State Electronics Mission on 30 June 2026 to explore a semiconductor materials production base at Dholera, described as exploratory in the company's own announcement.
What is absent is as informative as what is present. No purchase order from an Indian fab to any global tool maker is in the public domain. No silicon wafer supplier has announced Indian production. No photoresist manufacturer has announced an Indian plant. The equipment and materials layer is precisely the gap Semicon 2.0, approved by the Cabinet on 15 July 2026 with an outlay of Rs 1,27,500 crore, is written to attack DURABLE, and the first approvals under it will be the evidence that matters.
Layer five: design, counted rather than named
India's design layer is large, old and genuinely competitive, and it is also the layer where unsourced company lists do the most damage, because hundreds of firms describe themselves as semiconductor companies on the strength of a service contract. This register therefore counts the design layer instead of naming it, using the government's own figures.
The Lok Sabha reply of 1 April 2026 records 24 approved chip design projects covering video surveillance, drone detection, energy metering, microprocessors, satellite communications and broadband and internet-of-things systems on chip, of which fourteen companies have raised more than Rs 650 crore in venture funding, with seven chips fabricated including at 12nm DURABLE. Design tools from eight vendors have been provided free to 315 academic institutions with usage above 200 lakh hours, and 211 chips have been taped out by 75 institutions. The Cabinet release of 15 July 2026 counts 105 startups developing chips.
Any of those firms may deserve a company file here, and several will get one when a primary source establishes what they build and for whom. Until then, a number the government publishes beats a list this record cannot verify.
What the shape of the register tells you
Read the layers together and three structural features stand out, none of which is visible in a list of names alone.
The first is that Indian balance sheets are running licensed foreign process technology. Named foreign technology partners appear in at least six of the twelve approvals, while the investing entity in most cases is an Indian-registered company, and Micron Technology is the clearest case of a global chipmaker building its own plant here directly. India is buying process knowledge rather than waiting to invent it, which shortens the path to production considerably and leaves the deepest part of that knowledge in someone else's hands for at least the first technology generation.
The second is capital concentration. The Dholera wafer fab alone accounts for about Rs 91,526 crore of the Rs 1.64 lakh crore approved across all twelve units, so one project carries more than half the programme's capital and effectively all of its front-end risk. If that plant runs to schedule the portfolio looks balanced, and if it slips badly the eleven other units cannot compensate, because packaging a chip and fabricating one are not substitutes for each other.
The third is geographic concentration. Six of the twelve units are in Gujarat, and two of those, the wafer fab and Crystal Matrix's compound facility, are at Dholera itself. Clusters form for unglamorous reasons: gas and chemical logistics, power reliability, customs handling, staff housing, and the ability to get a service engineer to a broken tool the same day. The supplier layer follows the anchor plant rather than the policy map, which is why a gas plant or a chemical distributor arriving near an approved site counts here as firmer evidence of a cluster forming than another memorandum signed at a summit.
Who is not on this register, and why
The Vedanta and Foxconn joint venture is the most cited absence. Foxconn withdrew from it on 10 July 2023 DURABLE, and the widely quoted project value was never committed capital in any sense a ledger recognises. It belongs to history, and the Vedanta file holds that history rather than a live capital line. Any list that still carries it as a pending Indian fab is out of date by three years.
Also excluded: distributors and sales offices, which do not manufacture; electronics manufacturing services firms assembling boards, which is a different industry from packaging chips; companies named only in an investment-summit memorandum with no scope, value or site disclosed; and companies whose Indian link appears only in secondary aggregation. Several well-known global names have India development centres that do serious silicon work. They will appear here when a primary source states what that work is, not before.
How to test any company claim you read
Four questions settle almost every disputed entry. Is there an approval document naming the company, the state and the investment, or is there only an announcement? Is the activity fabrication, packaging or design, stated in the company's own words rather than a headline writer's? Is there a signed instrument, a fiscal support agreement, a land allotment, a construction contract, or only a memorandum? And has anything physical happened at the site that a third party has observed?
Applied consistently, those questions collapse most published lists to roughly the register above. They also explain why this record tracks a small number of companies closely rather than a large number loosely, and why the Dholera investor list is kept separate and tiered instead of merged into a national roll call. When a name graduates from announcement to approval, or from approval to construction, the entry moves and the date of the move is recorded.
Sources and verification trail
- Dholera knowledge base fact pack, verified to 27 July 2026.
- Dholera Digital capital ledger, August 2026 edition (dholera.digital/data/capital-ledger/).
- Dholera Digital key numbers, verified 27 July 2026 (dholera.digital/data/key-numbers/).
- Primary and reputable sources named inline on this page, each with its date.
- Verification method: dholera.digital/editorial-standards/