Guide

Gujarat's semiconductor map: who is building what, where

Published 3 August 2026. Facts verified to 27 July 2026 unless dated otherwise.

One state now hosts India's first commercial fab, its flagship back-end plant and the newest Cabinet-cleared units. The cluster did not happen by accident, and reading it as one system explains each piece better than any press release about one of them.

The three-node map

Dholera: the front end. Wafer fabrication, the capital-intensive heart of the industry: the Rs 91,000 crore Tata + PSMC fab, under construction inside a notified 66.16 hectare SEZ, commercial production now guided to mid-2028 DURABLE on the build, TARGET on the date. The full story is here.

Sanand: the back end. Micron's assembly, test, marking and packaging operation near Ahmedabad, the flagship of India's back-end push. It is routinely misfiled as a Dholera project by casual coverage, an error worth killing on sight, and our answer page exists to kill it DURABLE on the location facts.

The expansion wave. In May 2026 the Union Cabinet cleared two further semiconductor units for Gujarat, at Dholera and Surat, at a combined value above Rs 3,900 crore DURABLE on the clearance. Unit-level details beyond the clearance are thinner than headlines imply, and this record states them only to the depth its sources do.

The connective tissue

• Materials and gases: INOX Air Products' reported Rs 500 crore specialty gas hub at Dholera REPORTED and Fujifilm's exploratory materials MoU with the Gujarat State Electronics Mission REPORTED are the cluster's supply layer arriving; the supply chain briefing reads the pattern.
• Equipment: the ASML lithography MoU with Tata Electronics REPORTED, the engagement that matters most and proves least until orders follow.
• Power and ground: Dholera's live solar DURABLE and serviced TP-scheme land DURABLE are cluster infrastructure as much as city infrastructure; fabs choose geography for exactly these inputs.
• Policy machinery: the India Semiconductor Mission's fiscal architecture, evidenced concretely in the Tata Fiscal Support Agreement DURABLE, and the state's GSEM as the MoU counterparty, mapped on the policy guide.

Why clustering is the whole point

Semiconductor economics reward density brutally: shared supplier bases, shared talent pools, shared logistics, shared regulatory learning. A lone fab imports everything; a cluster amortises everything. Gujarat's bet is that front end at Dholera plus back end at Sanand plus an arriving materials layer compounds into the density that makes the next investment cheaper than the last, which is precisely the pattern the May 2026 clearances suggest is starting DURABLE. The counter-case is real too: clusters take a decade to thicken, and until the fab ships silicon the density is mostly prospective. Both readings are on this record; the ledger's dates will arbitrate.

How to read the next announcement

Whatever the next Gujarat semiconductor headline is, run it through three questions: which node of the map does it strengthen, what tier is it really at, clearance, MoU, or construction, and does it bring a capability the cluster lacks, or duplicate one it has. That triage, not the rupee figure in the headline, is what predicts whether it matters. It is also, not coincidentally, how every entry in our capital ledger is already filed.

The three nodes, and what each one actually does

Gujarat's semiconductor map is usually drawn as a single dot on the Gulf of Khambhat. It reads more honestly as three separate nodes doing three different kinds of work, each with its own physics, its own customer base and its own failure modes. Collapsing them into one headline is how most coverage goes wrong.

The first node is front-end silicon at Dholera: the Tata Electronics fab with Powerchip Semiconductor Manufacturing Corporation of Taiwan as technology partner, approved by the Union Cabinet on 29 February 2024 at Rs 91,000 crore DURABLE, with the Fiscal Support Agreement signed on 5 March 2025 and the Government of India committing 50 per cent fiscal support DURABLE. It is a 300mm line with a stated ceiling of 50,000 wafer starts per month TARGET across an official node range of 28, 40, 55, 90 and 110nm DURABLE. Front-end means patterned wafers, not finished chips.

The second node is compound semiconductors, also at Dholera. The Union Cabinet approved Crystal Matrix Limited on 5 May 2026 for an integrated compound semiconductor facility DURABLE, targeting 72,000 square metres a year of Mini and Micro-LED display panels and 24,000 sets of RGB Mini and Micro-LED gallium nitride epitaxy wafers TARGET. This is not a second silicon fab. It shares a postcode with the Tata line and almost nothing else.

The third node is back-end, and it is not at Dholera at all. Micron's assembly, test, marking and packaging plant sits at Sanand, a separate industrial location outside the Dholera Special Investment Region that is routinely and wrongly reported as part of it DURABLE. The distinction matters commercially as well as geographically: there is no published arrangement under which wafers from the Dholera fab would be packaged at Sanand REPORTED, and a captive back-end plant serving one company's own products is not a merchant packaging house open to any foundry customer. Gandhinagar sits outside that count of three altogether, supplying the policy and convening function rather than any manufacturing, and it is where the Gujarat Science, Technology and Innovation Policy 2026-31 was unveiled at Gujarat SemiConnect on 1 March 2026 DURABLE.

What a compound semiconductor fab is, and why CML is a different business

Silicon is an elemental semiconductor with an indirect bandgap of roughly 1.12 electronvolts. Indirect bandgap is the reason silicon is superb at switching and hopeless at emitting light: an electron falling across the gap has to shed momentum as lattice vibration rather than as a photon. Compound semiconductors are grown from two or more elements, typically from groups III and V of the periodic table, and many of them have direct bandgaps. Gallium nitride sits near 3.4 electronvolts, gallium arsenide near 1.42. Direct bandgap means efficient photon emission. Wide bandgap additionally means a higher critical electric field before breakdown, which is why gallium nitride and silicon carbide dominate high-voltage power conversion and high-frequency radio front ends where silicon runs out of headroom.

The manufacturing method diverges accordingly. A silicon fab starts from a bulk single-crystal wafer and builds transistors into its surface. A compound line starts with epitaxy: growing crystalline layers atom by atom onto a foreign substrate such as sapphire, silicon carbide or silicon, usually by metal-organic chemical vapour deposition. Because the grown layer and the substrate rarely share a lattice constant, strain management, buffer layers and defect density are the central engineering problems, and epitaxial wafer quality largely determines everything downstream. The "RGB epitaxy wafer" language in the CML approval reflects this: red emitters are typically built in the aluminium indium gallium phosphide system while blue and green come from indium gallium nitride, so a full-colour Micro-LED display needs more than one material system reconciled on one panel.

Mini-LED and Micro-LED are not the same product. Mini-LED devices, on the order of a hundred microns and above, are used as a finely zoned backlight behind a conventional liquid crystal panel, improving contrast without changing the display architecture. Micro-LED devices, tens of microns or smaller, become the subpixels themselves: self-emissive, no backlight, no liquid crystal layer. The hard problem is mass transfer. A modest display needs millions of individually grown dies moved from epitaxy wafer to panel substrate, placed with micron accuracy, at a defect rate low enough that a consumer never sees a dead subpixel. Yield arithmetic here is unforgiving, which is why redundancy schemes and laser repair steps exist at all. Note also that the CML capacity is stated in square metres a year, the unit of a glass panel line, alongside "sets" of epitaxy wafers, a unit that has not been publicly defined DURABLE. Those are two different manufacturing businesses under one approval, and the published material does not resolve how they are phased.

The materials and gases layer, where fabs quietly live or die

Wafer fabs are usually described by their tools. They are more accurately described by their consumables. A 300mm line runs on a continuous, non-negotiable supply of ultra-high-purity bulk gases, principally nitrogen for purge and tool ambient, plus oxygen and argon, at volumes large enough that trucked liquid is uneconomic and an on-site air separation unit piped directly into the plant is the standard arrangement. That is the significance of INOX Air Products beginning construction in October 2025 of a Rs 500 crore electronic specialty gas hub at Dholera DURABLE, with a 200 tonne-per-day air separation unit and specialty gases alongside the bulk stream REPORTED. Linde is reported to be advancing plans for a Dholera plant producing oxygen, nitrogen and argon, on thin sourcing that deserves scepticism until confirmed REPORTED.

Purity is the whole game. Bulk gases are delivered at parts-per-billion contamination levels through electropolished welded stainless steel, with point-of-use purifiers at the tool, because a single moisture or oxygen excursion can quietly destroy weeks of work in progress before anyone reads it in the electrical test data. Specialty gases used in deposition and etch are handled in dedicated gas cabinets with abatement, since many are pyrophoric, corrosive or both. Beyond gases sit the wet chemicals, photoresists, developers, chemical mechanical planarisation slurries and ultrapure water systems, each of which has to be qualified against the specific process flow rather than merely bought.

That qualification cycle is why a local materials base does not follow automatically from a local fab. Changing a resist or a slurry supplier means re-running process characterisation, re-proving defectivity and re-establishing statistical control, a programme measured in many months. Fujifilm's memorandum of understanding with the Gujarat State Electronics Mission on 30 June 2026 is explicitly to explore a semiconductor materials base REPORTED, and exploring is the correct word for where that stands. The India Semiconductor Mission 2.0 announced in the Union Budget 2026-27 points the next tranche of policy money at equipment and materials manufacturing and at full-stack Indian semiconductor intellectual property DURABLE, which is a recognition that the first tranche bought fabs without buying their supply chains.

Policy instruments, node by node

The incentive stack is layered rather than singular, and each layer attaches to a different thing. Central capital support under the India Semiconductor Mission covers 50 per cent of project cost for the approved fab DURABLE. On top of that, the Gujarat Semiconductor Policy 2022-27, announced on 27 July 2022 and the first state semiconductor policy in India, adds 40 per cent of the capital assistance approved by the Government of India DURABLE. The state policy then attacks operating cost directly rather than only capital cost: a 75 per cent land subsidy on the first 200 acres for a fab in Dholera Semicon City and 50 per cent beyond that, water at Rs 12 per cubic metre for five years with 10 per cent annual escalation thereafter, a power subsidy of Rs 2 per unit for ten years with electricity duty exemption, and a 50 per cent capital subsidy for a desalination plant built within the first five years DURABLE.

The Special Economic Zone notified by the Union Ministry of Commerce and Industry for Tata Semiconductor Manufacturing Private Limited at Dholera on approximately 16 April 2026, covering 66.16 hectares DURABLE, does something different again. An SEZ is treated as outside the customs territory for duty purposes, which matters enormously when essentially every lithography, deposition, etch and metrology tool in the plant is imported. Employment figures attached to that notification, around 21,000 in press coverage REPORTED, sit alongside Tata's own 2024 statement of 20,000 plus direct and indirect jobs REPORTED. These are not the same claim, and neither is a hiring plan.

Adjacent instruments extend the same logic outwards. The Gujarat Electronics Component Manufacturing Policy 2025 offers 100 per cent matching state assistance to projects approved under the central component scheme DURABLE. The Viksit Gujarat Industrial Policy 2026 of 15 June 2026 sets banded support running from 35 to 45 per cent of investment for MSMEs down to 25 to 35 per cent for large units in thrust sectors DURABLE. The Viksit Gujarat Data Centre Policy 2026-29, announced on 9 July 2026, sets a qualifying threshold of at least 150 MW of IT load and reserves an additional 2.5 per cent capital subsidy specifically for projects inside Dholera SIR, alongside a Rs 1 per unit power tariff subsidy for twenty years and full electricity duty reimbursement over the same period DURABLE. The important qualifier across all of it: incentives of this kind are typically milestone-linked disbursements against verified investment rather than cash at announcement, which is a large part of why announced value and deployed value diverge so widely in every reported total.

Cluster economics, and why density compounds slowly then quickly

Semiconductor clusters are a textbook case of agglomeration economics, and the mechanism is worth stating plainly rather than gesturing at. A single fab must carry the entire fixed cost of its support environment: the gas plant sized for one anchor load, the field service engineers flown in for tool downs, the spare parts depot, the calibration and failure analysis laboratories, the chemical distribution, the specialised construction trades who can weld high-purity piping to a certifiable standard. Every one of those costs is largely invariant to the number of customers using it. The second tenant therefore pays a fraction of what the first paid, and the third less again.

Two further effects compound on top. First, response time collapses as density rises. A tool vendor with two customers in one industrial area will station engineers locally rather than regionally, and unplanned downtime on a capital-intensive line is measured in lost wafer starts per hour. Second, labour becomes liquid. Process, yield and equipment engineers are the scarcest input in this industry, and they only move to a location where a second employer exists, because a one-employer town is a career cul-de-sac. That is the structural reason the training programme matters: Tata sending a couple of hundred people to Powerchip in Taiwan in reported batches of around 75 across equipment, yield, process technology and quality engineering REPORTED builds the first cohort, but a cohort is not a labour market.

Measured against that, the current state of the cluster is early and should be described as such. Twelve plots allotted, of which 436 acres are industrial, with Tata Chemicals named anchor investor, as reported by the NICDC and DPIIT delivery monitoring exercise dated 31 May 2026 DURABLE, is land allocation rather than industrial density. Trunk infrastructure works across the 22.5 square kilometre Phase I activation area are recorded as complete DURABLE, and industrial land was described as readily available for allotment as of May 2026 DURABLE. Availability is the correct precondition and the wrong success metric. The signal to watch is not plot count. It is whether tool vendors, gas handlers, calibration houses and chemical distributors open permanent local offices, because those firms follow demand rather than announcements and they do not stay where the work is not.

The shared utility spine, and the contention nobody has priced

Fabs and data centres are both being invited to the same site, and they compete for the same two constrained inputs. On power, the 1,000 MW Dholera Solar Park has 300 MW commissioned by Tata Power Solar DURABLE, with the remaining 700 MW under development against a March 2027 target TARGET. Solar nameplate capacity is not the relevant quantity for either tenant. A wafer fab requires firm, uninterruptible, tightly regulated supply, because a voltage sag of a few cycles can abort processes across a whole tool set and scrap material; the industry standard answer is grid firmness plus substantial on-site conditioning and backup. Photovoltaic generation is intermittent by construction, so it displaces energy cost without supplying reliability, and the reliability layer has to be procured separately.

Water is the sharper constraint. The site currently has a roughly 20 MLD desalination plant DURABLE, with a tender issued on 9 July 2026 to appoint consultants for a 200 MLD seawater desalination plant DURABLE, which places actual delivery of that capacity some years out and unquantified in public. A 300mm fab consumes large and continuous volumes of ultrapure water for wafer rinsing, and while modern plants recycle a substantial share, the make-up requirement remains significant and cannot be interrupted. Data centres draw on the same resource on a different curve, and the published figures for that curve do not agree with each other. One commonly cited rule of thumb puts a megawatt of load at roughly 25 to 26 million litres a year on evaporative cooling assumptions REPORTED, while a separately reported figure puts a 100 MW facility at around two million litres a day REPORTED. Those two do not reconcile, since the first implies closer to seven million litres a day at 100 MW, and the gap is itself the useful information: water draw is set almost entirely by the cooling design chosen, and no cooling design has been published for any facility proposed here. Set that against a data centre policy that only engages at 150 MW of IT load and above, with an extra subsidy tier reserved for projects inside Dholera SIR DURABLE, and the arithmetic of a shared desalination and pipeline spine becomes a genuine planning question rather than a rhetorical one. No public allocation document we can point to addresses that contention, and pretending otherwise would be dishonest.

The honest timeline

The most consequential recent development is not an infrastructure milestone but a correction to expectations. Bloomberg reported on 17 July 2026, carried via Outlook Business, that the fab will open mostly at 90nm rather than 28nm, with commercial production in mid-2028 REPORTED, and TrendForce corroborated on 20 July 2026 REPORTED. A Tata spokesperson stated that the plan "has always been to start with 55nm and 90nm before introducing 28nm", and Powerchip's Eric Tang noted that technology transfers are "typically introduced gradually, starting with more mature nodes" REPORTED. This is entirely normal engineering practice: mature nodes have wider process windows, more forgiving overlay and critical dimension budgets, and a shorter path to stable yield, which is exactly what a first-time manufacturing organisation needs while it learns. It is also not what the public record consistently said. Tata Sons chairman N Chandrasekaran wrote in the annual report for the year ended March 2025 that "We have chosen to start our chip journey at the 28nm node" DURABLE. Both statements are on the record and they do not reconcile.

Node choice is not a technicality. It sets the addressable market, the price per wafer and the customer list, and the products named on Tata's own foundry page, power management integrated circuits and microcontrollers DURABLE, are genuinely served at 90nm and 55nm. The mid-2028 commercial production guidance from the Union minister on 17 July 2026 TARGET should therefore be read as the operative date. The earlier "first chip by December 2026" framing traces to ministerial statements and is not supported by anything in the current record, and no first silicon has been reported as of 4 August 2026 REPORTED.

Construction reality is thinner in the public domain than most coverage implies. Foundations for the main fab were being redesigned after soil testing found the ground unsuitable, with Fugro, Cengrs and Geo Dynamics engaged, as reported on 28 November 2025 REPORTED. That is a serious item: a fab floor has to hold vibration within tolerances measured in micrometres per second for lithography and metrology tools, and on soft coastal ground that usually means deep piling and isolated tool foundations, which is expensive and slow rather than fatal. A Malaysia-based cleanroom specialist, IAQ Group, was onboarded for cleanroom design and installation as reported in June 2026 REPORTED. Against those, the negatives deserve equal billing. There is no publicly confirmed main engineering, procurement and construction contractor, and there are no publicly disclosed valued equipment purchase orders REPORTED. Widely circulated claims that the project was "50 per cent complete" in April 2026, that foundations are finished, or that cleanroom installation is underway, appear only on real-estate and search-optimised sites with no primary source behind them, and should be treated as unsourced REPORTED.

The verifiable markers to watch, in rough order of appearance, are these. A named civil and EPC contractor with a disclosed scope. Valued tool purchase orders, particularly for lithography, given that the ASML memorandum of understanding announced on 16 May 2026 by both ASML and Tata Electronics named the 28 to 110nm range REPORTED but a memorandum is not a shipment. Cleanroom certification to a stated ISO class. Tool move-in and hook-up. First test wafers, then a qualified process, then customer qualification, which is itself a multi-month exercise before a single revenue wafer ships. Each of those is publicly observable when it happens. Until they do, the honest position is that the fab is under construction with a stated mid-2028 production target TARGET and a node plan that has been publicly revised, and anything more specific than that is not currently supported by primary sources.