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India's semiconductor build-out, tracked from the ground
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Front Page › Guides › India's chip packaging industry: the nine approved units, one by one

Guide

India's chip packaging industry: the nine approved units, one by one

Nine of the twelve projects approved under the national mission are packaging plants, and two of them are already in commercial production, which makes the back end the only part of the build-out with an operating record.

What this page establishes

  1. Why the back end came first
  2. What packaging actually does
  3. The nine approved units
  4. What is actually running as of 25 August 2026
  5. The global industry these plants are joining
9 of 12

Of the 12 projects approved under the India Semiconductor Mission as of June 2026, nine are packaging units and only one is a silicon wafer fab. Micron's Sanand plant reached commercial production in February 2026 and Kaynes Semicon in March 2026, per the mission's own website read on 25 August 2026.

Source: PIB, 22 June 2026 and ism.gov.in, read 25 August 2026. As of 27 July 2026.

Why the back end came first

India's semiconductor programme is described in public as a fab story and is, by project count, a packaging story. The Press Information Bureau's document of 22 June 2026 gives the composition of the 12 approved projects precisely: one semiconductor fab, two compound semiconductor fabs and nine packaging units DURABLE . That ratio is not an accident of who applied. It is what the capital ladder looks like in every country that has started this industry from a standing position.

Compare the tickets. The Dholera wafer fab carries a project cost of Rs 91,526 crore. The smallest approved packaging expansion, Continental Device India's Mohali line, carries Rs 117 crore. A packaging plant runs in a cleanroom class far less stringent than a wafer fab's, its tool set costs a fraction of front-end lithography and etch equipment, it hires operators who can be trained in months, and the general industry pattern is revenue in roughly two to three years against five to seven for a greenfield fab. Our investment economics guide works that ladder through in detail.

What packaging actually does

A finished wafer is not a product. Packaging, in its conventional form, takes tested wafers and turns each good die into a handleable, solderable, protected component. The sequence runs: back-grinding to thin the wafer, dicing into individual die, attaching each die to a leadframe or substrate, forming electrical connections by wire bond or by flipping the die onto solder bumps, encapsulating in mould compound, marking, then testing the finished part and packing it in tape and reel. Each step has its own yield, its own consumables and its own failure signatures. The mechanism is taught properly on this desk's packaging and test page.

The naming causes needless confusion. In Indian policy documents the activity is called assembly, testing, marking and packaging, abbreviated ATMP. The global industry calls a company that does this work for others an outsourced semiconductor assembly and test provider, or OSAT. An integrated device manufacturer that packages its own chips is doing ATMP without being an OSAT. The distinction is contractual, not technical, and it is set out on our three-letter map.

The nine approved units

The figures below are as printed in the Press Information Bureau backgrounder of 7 February 2026, except the Suchi Semicon entry, which comes from the Cabinet decision of 5 May 2026 as reported the same day DURABLE .

UnitStateInvestmentStated capacity
Tata Electronics, JagiroadAssamRs 27,120 crore48 million units per day
Micron Technology, SanandGujaratRs 22,516 croreabout 14 million units per week
CG Power and Industrial Solutions, SanandGujaratRs 7,584 crorenot stated in the backgrounder
Vama Sundari Investments, JewarUttar PradeshRs 3,706 crore20,000 wafers and 36 million chips per month
Kaynes Technology India, SanandGujaratRs 3,307 croremore than 6.33 million chips per day
3D Glass Solutions, BhubaneswarOdishaRs 1,943 crore5,800 panels per month, 4.20 million units per month
Suchi Semicon, SuratGujaratpart of Rs 3,936 crore pair1,033.20 million chips per annum
Advanced System in Package TechnologiesAndhra PradeshRs 480 croreabout 96 million units per annum
Continental Device India, MohaliPunjabRs 117 croreabout 158.38 million units per annum

Five notes on reading that table honestly. Capacities are stated in incompatible units, so units per day, per week, per month and per annum cannot be added or ranked without assumptions this desk will not make. The Micron plant packages memory and does not fabricate it, a distinction our memory guide insists on. The CG Power unit is a joint venture with Renesas Electronics America and STARS Microelectronics of Thailand, which is how a first-time operator buys process discipline. And the Jewar unit is the awkward member of this list: its capacity is quoted partly in wafers per month, it is universally described as a display driver chip plant, yet the mission's own composition count of one fab, two compound fabs and nine packaging units can only reach nine by including it. Neither document explains the classification, so this record prints the tension rather than resolving it REPORTED . The Mohali entry raises the same question from the other end, since Continental Device India is described in the approval record as manufacturing high-power discrete devices rather than as an assembly house for other people's silicon, which tells you that the mission's nine-unit bucket is a funding category rather than a technical description of what each plant does.

What is actually running as of 25 August 2026

This is where the back end separates itself from the rest of the programme. The mission's own website, read on 25 August 2026, records that Micron's Sanand unit commenced commercial production in February 2026, that Kaynes Semicon's Sanand unit commenced commercial production in March 2026, and that CG Semi's Sanand unit is recorded as inaugurated in July 2026 DURABLE . The same source records a groundbreaking for the 3D Glass Solutions project at Bhubaneswar in April 2026 and for the Jewar unit in February 2026 DURABLE .

Two plants in commercial production, a third inaugurated, and two more with groundbreakings behind them is a real record, and it is the only part of the Indian portfolio that can be assessed on output rather than intention. It also sets a fair expectation for the front end: the Dholera fab's commercial production is guided to mid-2028, no first-silicon date is supported by any source this record accepts, and civil progress was about 50 percent as of mid-2026 with cleanroom fit-out under way TARGET . The two clocks are worth putting side by side. Micron's Sanand plant was approved in June 2023 and was in commercial production by February 2026, under three years later. The Dholera fab was cleared on 29 February 2024 and is guided to commercial production in mid-2028, which is about four and a half years, on a project costing roughly four times as much. That difference in tempo, rather than any judgement about ambition, is why a country builds the back end first.

The global industry these plants are joining

Outsourced assembly and test is a mature, concentrated, thin-margin industry, and it sits almost entirely in Asia. Taiwan is the centre of gravity, with China, South Korea, Malaysia, Singapore, the Philippines and Vietnam holding most of the rest, and the largest independent providers are Taiwanese, American and Chinese companies operating plants across those countries. This record does not publish market-share tables it has not verified, and it does not rank private companies. The structural facts that matter for India are simpler: the customers are the world's chipmakers, the contracts are won on qualification and cost rather than on novelty, and incumbents have decades of accumulated yield learning on the same package families a new entrant would start with.

The one thing shifting in that industry's favour is that packaging has become a performance frontier rather than a commodity step. Flip-chip, fan-out and stacked approaches now decide how much bandwidth a system delivers, which is why the advanced end of packaging attracts capital that conventional assembly never did. Our advanced packaging page explains that shift, and the honest placement of India's approved base on that ladder is near the conventional end, with two exceptions: the glass panel substrate and heterogeneous integration work approved in Odisha, and the indigenous packaging technologies described for the Jagiroad plant. No approved Indian project should be described as running 2.5D or 3D stacking for merchant customers on the strength of the public record.

Qualification, yield and why customers move slowly

The hardest thing about entering this business is not building the plant. It is convincing a chip company to let a new provider touch its silicon. Under standard semiconductor manufacturing practice, a customer qualifies a package at a specific site on specific equipment with specific materials, then audits the quality system behind it. The package itself goes through reliability testing: temperature cycling, high-temperature storage, humidity stress with bias, mechanical shock and board-level drop and bend tests, followed by cross-sectioning to look for delamination and wire sweep. Only after that does a first production lot ship, and any later change to a material, a bonder or even a mould compound supplier can reopen the qualification.

Two consequences follow for the nine approved Indian units. Time to first merchant revenue is governed by the customer's calendar, not the builder's, and a plant can be mechanically complete for a year before it is commercially loaded. And a captive or joint-venture start has a structural advantage, because a parent or a partner qualifies its own line faster than a stranger's. The portfolio shows both routes. Micron's Sanand plant packages its own parent's memory, and the CG Power unit arrived with joint-venture partners who already sell packaged parts, while Kaynes reached commercial production in March 2026 as a domestic electronics manufacturer with neither advantage, which makes its qualification record the more instructive one to follow.

Yield in packaging is quieter than fab yield and no less expensive. Losses concentrate in die attach voiding, wire bond non-stick, mould flash and voids, warpage on thin packages, and above all in handling damage on parts that have already absorbed the entire cost of a finished wafer. Scrapping a die at final assembly destroys value the fab spent months creating, which is why assembly houses obsess over particle control, tool calibration and operator discipline in ways that look disproportionate to the equipment cost.

The operator layer is the binding constraint on all of it. A packaging line needs technicians who can run and maintain bonders, moulders, handlers and testers, and India is building that pool through a training partnership with Lam Research aimed at 60,000 trained professionals over ten years and a lab at NIELIT Calicut targeting one lakh engineers with more than 62,000 trained, per the Press Information Bureau backgrounder of 7 February 2026 TARGET . Training figures are inputs, not outcomes. The outcome to watch is line yield at the plants now running.

The layers underneath that India still imports

A packaging plant consumes substrates, leadframes, bonding wire, die-attach films, mould compounds and reels, and India makes almost none of them at semiconductor grade. Every unit in the table above will import that bill of materials at first, which is why arrivals in that layer are the strongest available evidence that a cluster is forming rather than a single plant. Our packaging materials guide maps the suppliers and the localisation opportunity, and the same logic runs through the test layer, where handlers and automated test equipment are imported and the skills are scarce.

Test deserves its own note, because it is the step most often lost inside the word packaging. Final test can account for a significant share of a mature-node part's cost, it needs expensive automated equipment and it produces the data that tells a plant whether its assembly process is drifting. A country that builds assembly capacity without test capacity has built a subcontractor to a subcontractor. The testing industry guide takes that argument up in full.

What packaging does not buy

Nine packaging units do not make a semiconductor industry, and saying so is not a criticism of the sequencing. Assembly and test capture a small share of the value of a finished chip; the wafer, the process technology and the design carry the rest. A packaging plant does not confer the ability to fabricate transistors, does not create process intellectual property, and can be relocated by a customer with less disruption than moving a fab. The strategic argument for building it first is that it creates operators, quality systems, customer relationships and a supplier base, which are the things a front-end fab needs to exist around it.

The geography now reads coherently for the first time. Front-end wafer fabrication is approved at Dholera, back-end assembly is approved and partly operating at Sanand, Jagiroad, Jewar, Surat, Bhubaneswar, Mohali and in Andhra Pradesh, and the wafers will have to travel between them once the fab runs. Our cluster map tracks the Dholera end of that geography as it fills in.

What to watch next

Four signals will show whether this base becomes an industry. The first is customer disclosure: an Indian plant naming a merchant customer that had a choice of provider is worth more than any capacity number. The second is utilisation, because approved capacity and running capacity are different things and only the second earns money. The third is export volume, since the domestic electronics market cannot absorb these capacities alone. The fourth is the materials layer, where a substrate or leadframe plant siting itself beside an Indian OSAT would be the first genuine evidence of a supply chain rather than a set of plants. This desk will report each as it is documented, and will keep capacity claims tagged at the tier the source supports.

Cite this: "Chip packaging companies in India: the nine approved ATMP and OSAT units with investments and capacities, their operating status, and why packaging came first." Dholera Digital, 2026-08-03. https://dholera.digital
Sources and verification trail
  1. Dholera knowledge base fact pack, verified to 27 July 2026.
  2. Dholera Digital capital ledger, August 2026 edition (dholera.digital/data/capital-ledger/).
  3. Dholera Digital key numbers, verified 27 July 2026 (dholera.digital/data/key-numbers/).
  4. Primary and reputable sources named inline on this page, each with its date.
  5. Verification method: dholera.digital/editorial-standards/