Guide

The semiconductor supply chain, stage by stage

Published 25 August 2026. Facts verified to 25 August 2026 unless dated otherwise.

A chip crosses more borders before it works than most finished products do in their lifetime, and every stage has a different industrial logic.

Why the chain is usually described badly

Most explanations of the semiconductor supply chain draw a straight line from sand to smartphone. That picture is tidy and misleading, because it hides the two things that actually matter: each stage is a separate industry with its own competitive structure, and each stage sits in a different place on the map for reasons that took decades to set. A country cannot enter the chain at a stage of its choosing. It enters where its factor costs, customer proximity and accumulated process knowledge let it enter, and then it argues its way upstream or downstream from there.

This guide walks the chain in order, names what each stage produces, describes where it concentrates and why, and then marks India's position at each one honestly. Where a figure appears it carries a source and a date. Where the honest answer is that India has no presence, this page says so rather than reaching for a plan.

The design half: EDA, IP, design and masks

The chain begins with software and intellectual property rather than with material. Electronic design automation tools are the environment in which a chip is specified, simulated, laid out, verified and checked against the manufacturing rules of a specific fab. That market is dominated by a very small number of American and European vendors, and it is one of the tightest choke points in the whole chain, because no chip of any complexity can be designed without them.

Alongside the tools sits licensed intellectual property: processor cores, interface blocks, memory compilers, analog cells. A modern design is assembled substantially from bought-in blocks, which is why a design team's competitive question is usually integration and differentiation rather than building everything.

Design itself then splits into product companies, which own the chip and sell it, and design services, which execute someone else's chip. The distinction is decisive for value capture, and it is the crux of India's position, discussed below. Design ends at tape-out, when the layout is finalised and sent for mask data preparation.

Masks are the physical bridge from design to manufacturing: quartz plates carrying the pattern for each layer, written by electron-beam or laser systems, inspected and repaired to defect specifications that are unforgiving because a single mask defect repeats on every wafer. Mask shops sit either inside large chipmakers or in a small number of independent merchant suppliers, mostly in Japan, Taiwan, Korea, the United States and Europe. A fab without a qualified mask supply cannot start, which our photomasks page takes apart in detail.

The input half: wafers, materials and equipment

Three input industries feed the fab, and they behave differently from one another. Wafers are a concentrated materials business with a short supplier list and long qualification cycles. Process materials, meaning photoresists, developers, planarisation slurries, precursors, specialty and wet chemicals, and sputtering targets, are consumed daily and their suppliers' revenue tracks wafer starts rather than construction spending. Gases split into bulk, which localises next to the fab because moving nitrogen at volume makes no sense, and specialty, which is made in few places and fulfilled locally.

Equipment is the outlier: capital rather than consumable, bought from a global oligopoly, and effectively never localised in the first decades of a national industry. Because the tools cost far more than the shell that houses them, a headline investment figure for any fab is mostly an order book payable to a small number of foreign suppliers. Both layers are treated at length in our guides to the equipment industry and to wafers and materials.

The fab: where the chain narrows

Front-end fabrication is the stage everyone pictures, and it is the most capital-intensive link in the chain. A wafer entering a fab will be processed through several hundred steps over a period measured in weeks to months, cycling through deposition, patterning, etch, implantation, planarisation, cleaning and measurement, layer after layer, until transistors and their wiring exist.

Three business models coexist here. Integrated device manufacturers design and make their own chips. Pure-play foundries make other companies' designs. Fabless companies design and own products and buy manufacturing. The foundry model is what made the fabless industry possible, and it is the model the Dholera plant follows through Tata Electronics' partnership with Taiwan's PSMC, whose terms this record tracks on the partnership page.

Fab output is concentrated by both geography and node. Leading-edge logic is made in very few places. Mature-node capacity is more widely spread but still clustered in East Asia. The Dholera fab targets 28 to 110nm on 300mm wafers with a stated capacity of up to 50,000 wafers per month and an approved investment of Rs 91,000 crore, the fiscal support agreement of 5 March 2025 citing Rs 91,526 crore DURABLE. Reporting by Bloomberg on 17 July 2026 and TrendForce on 20 July 2026 says the plant will open mostly at 90nm rather than the 28nm that the Tata Sons chairman's FY25 letter described as the starting node, a contradiction this record documents rather than resolves REPORTED.

The back end: assembly, packaging and test

A finished wafer is not a product. It is probed and sorted so that failing dies are marked, then thinned, diced into individual chips, attached to a substrate or leadframe, connected by wire bonds or solder bumps, encapsulated, and tested again as a finished package. This back end is a real industry with its own giants, concentrated in Taiwan, China, Malaysia, the Philippines and Korea, and its capital intensity is an order of magnitude below a front-end fab.

That difference in capital intensity is why almost every country entering this industry enters here. It is also why India's approved portfolio looks the way it does. Under the India Semiconductor Mission's status published through the Press Information Bureau and current to July 2026, twelve manufacturing units carrying cumulative investment of over Rs 1.64 lakh crore have been approved, comprising one silicon fab, two compound-semiconductor fabs and nine packaging and test units, with four of the twelve in Gujarat and three of those in Sanand DURABLE. Micron's Sanand assembly and test plant was approved in June 2023, the CG Power joint venture with Renesas and Stars Microelectronics and Tata's Assam plant at Jagiroad in February 2024, Kaynes Semicon in September 2024 and the HCL and Foxconn unit near Jewar in May 2025, all through Union Cabinet decisions announced by the Press Information Bureau on their respective dates DURABLE. The layer is mapped in full in our packaging industry guide.

Distribution, and the part of the chain that breaks first

After final test, chips move through distributors, contract manufacturers and, in shortages, brokers. This stage looks administrative and is not. Lead times here are what an automaker or an appliance maker actually experiences, and the shortage of the early 2020s was largely a distribution and allocation crisis layered on a capacity problem: when supply tightens a maker serves the customers whose volume it already depends on, and everyone else waits.

Two structural features are worth knowing. First, buffer inventory is thin by design across most of the chain, so demand shocks propagate quickly and get amplified by double ordering. Second, qualification locks customers in: an automotive or industrial buyer cannot switch a qualified part quickly, so a shortage in one narrow component can idle a plant making something worth a thousand times more. That asymmetry is the reason mature-node capacity became a strategic question for countries that build cars and appliances rather than chips.

Three ways this chain breaks

Understanding the stages is less useful than understanding the failure modes, because the failure modes are what turn an industrial diagram into a policy question. There are three, and they are not equally likely.

The first is physical concentration. Several stages depend on a small number of plants in a small number of places, so a fire, an earthquake, a flood or a prolonged power failure at one site removes a slice of world supply that cannot be replaced quickly, because the replacement has to be qualified. The industry has learned this repeatedly through single-plant incidents in materials and substrates, and it is the reason large buyers now audit their suppliers' suppliers.

The second is policy. Export controls, licensing regimes and procurement rules can make a legal transaction illegal between one quarter and the next, and they bite hardest at the leading edge of equipment and design tools. A mature-node fab is comparatively insulated from this, which is a structural feature of India's position rather than a diplomatic achievement.

The third is qualification lock-in, which is the quiet one. Because a qualified part cannot be swapped quickly, a shortage of a component worth a few dollars can idle a production line making something worth thousands, and buyers respond by double ordering, which amplifies the shortage they are reacting to. Every serious capacity programme of the last five years, including India's, traces back to this mechanism more than to any national-pride argument, as our page on the strategic case sets out.

India's position, stage by stage

The summary line is that India is strong in design work, entering at packaging and test, building one front-end fab, and absent in wafers, masks and equipment. That is a coherent position rather than a contradictory one. It is close to how Taiwan and Korea began, and unlike those precedents it starts with a design workforce already in place, which is an advantage in talent and a disadvantage in nothing.

What a first fab changes in the chain, and what it does not

It changes three things concretely. It creates a domestic customer for gases, chemicals, logistics and facility services, which is why suppliers are moving at Dholera before any wafer starts. It creates a place where Indian engineers learn front-end process work, which cannot be taught from a design centre. And it creates a reference: the second fab in any country is financed against the first one's operating record, which is why delivery at Dholera matters beyond Gujarat.

It does not create self-sufficiency, and this record has never said otherwise. Wafers, tools and masks all continue to arrive from abroad, and leading-edge dependence is untouched because the plant was never aimed at the leading edge. The accurate word for what a first fab buys is participation, and participation is worth having: it converts a country from a buyer with no standing into a customer with a plant, which is a different position in every allocation conversation that follows.

What this desk watches next

Along the chain, in order. Whether the mask and materials questions for Dholera get any public answer, since both are currently blank. Whether a second materials name follows Fujifilm's exploration. Whether the packaging wave produces qualified output, because a package that no customer has qualified is a building with machines in it. And the schedule itself: commercial production at Dholera is guided to mid-2028 by the electronics and IT minister Ashwini Vaishnaw on 17 July 2026 TARGET, civil works stood at about 50 percent as of mid-2026 with cleanroom fit-out under way DURABLE, and no supported first-silicon date exists anywhere in the public record. This desk scores that guidance when it comes due, and files everything else where it belongs, in the capital ledger, at the tier the evidence supports.