Guide

The global semiconductor race in 2026, and where India actually fits

Published 25 August 2026. Facts verified to 25 August 2026 unless dated otherwise.

Every large economy is buying capacity at once. India's entry is small, late and aimed at a segment the others are mostly leaving alone.

The concentration that started the race

The national chip programmes of the 2020s all trace to the same two observations, and both are stated in a single Indian government document, which makes them convenient to cite without reaching for advocacy material.

The Press Information Bureau's India Semiconductor Mission 2.0 backgrounder of 7 February 2026 records that the industry is dominated by a few countries including Taiwan, South Korea, Japan, China and the United States, that Taiwan alone produces over 60 percent of the world's semiconductors and nearly 90 percent of the most advanced chips, and that the COVID-19 pandemic exposed supply chain weaknesses with shortages affecting more than 169 industries worldwide DURABLE.

Those two facts explain the behaviour that followed. A concentrated supply of an input that more than a hundred industries depend on is a fragility, and the response recorded in that same document is that the United States, the European Union, Japan and South Korea have each launched national initiatives to strengthen domestic manufacturing and diversify supply. The result is a simultaneous global build-out competing for the same construction capacity, the same tool delivery slots and the same process engineers, which is a fact that prices into every schedule including India's.

The programmes, at headline size only

This page holds programme sizes to headline figures and stops there, because a proper comparison of incentive instruments is its own subject and belongs on the chips acts comparison. The headline numbers, each attributed:

• United States. The CHIPS and Science Act, signed on 9 August 2022, appropriated about US$52.7 billion in federal funding for domestic semiconductor manufacturing and research DURABLE. How much of that has been disbursed rather than awarded is tracked by the US Department of Commerce, and this record has not verified a current figure for it.
• European Union. The EU Chips Act, adopted in 2023, is framed by the European Commission around mobilising about EUR 43 billion in public and private investment, with the stated aim of doubling Europe's share of global manufacturing capacity.
• Japan. The most prominent single project is Rapidus at Chitose in Hokkaido, aimed at 2nm-class production, reported in trade coverage with government support of about 920 billion yen and risk production scheduled for 2027 TARGET. This record has not verified either figure against Japanese government documents.
• India. The India Semiconductor Mission was approved by the Union Cabinet in December 2021 with an incentive framework of Rs 76,000 crore offering fiscal support of up to 50 percent for silicon fabs, compound semiconductor facilities, assembly and testing units and chip design. The Modified Programme for 2026-27 carries a total financial outlay of Rs 8,000 crore, and ISM 2.0 was given a provision of Rs 1,000 crore for the same year DURABLE. All four figures are from the Press Information Bureau backgrounder of 7 February 2026.

Two entries are deliberately absent. This record has not verified a current headline figure for China's programmes and will not print one from memory, and the same applies to South Korea's national package. An honest blank is worth more here than a number that reads plausibly and cannot be traced. Where those figures matter to a reader, the correct source is each government's own budget documentation.

What the money is actually buying, and where

Programme sizes are the least informative part of this comparison, because the same rupee, dollar or euro buys very different things depending on where in the chain it lands.

Leading-edge logic capacity is the most expensive thing a programme can buy and the hardest to operate. A single advanced fab absorbs tens of billions of dollars, needs extreme ultraviolet lithography, and depends on an ecosystem of suppliers that exists in very few places. The American, Japanese and European programmes are all, at their most prominent, buying this.

Mature-node capacity is an order of magnitude cheaper per unit of output and sells into a demand base that renews rather than obsoletes: power management, display drivers, microcontrollers, analog and automotive parts. The mature-node guide makes the commercial argument in full.

Back-end capacity, meaning assembly, test and packaging, is cheaper again and faster to build, and it is where most new industrial entrants start. India's approved list is dominated by it.

Design capability is the cheapest layer to fund and the slowest to build, because it is entirely a function of people. It is also the layer where India already has standing.

Read that way, the programmes are not really running the same race. They are buying different rungs of the same ladder, and the rung determines the timeline, the risk and the sort of victory available.

The queue, read by date

Schedules are the most honest comparison available, because they are stated publicly and can be scored against later. A short queue, with tiers:

Three notes keep that table honest. The status lines for the American and Japanese sites are drawn from company announcements and trade coverage reviewed on 25 August 2026, not from any filing this desk has read in full. Per-fab wafer capacity figures for those sites circulate mainly through third-party trackers rather than company disclosure, and this record does not print them. And for Dholera there is no supported first-silicon date in the public record at all; the mid-2028 figure is commercial production guidance given by the electronics and IT minister on 17 July 2026 TARGET, and the December 2026 first-silicon claim that still circulates is unsupported. The global build-out page carries the project-by-project construction record.

The input crunch every programme created together

The most underrated consequence of a simultaneous global build-out is that all the programmes are bidding for the same scarce inputs, and the scarcity is not in capital. It is in specialist construction capacity, cleanroom fit-out contractors, high-purity mechanical and electrical trades, tool delivery slots at suppliers whose output is finite, and process engineers with a working line behind them.

That has a specific effect on schedules that is easy to miss when reading any single project. Slippage becomes correlated. When several large fabs are hooking up tools in the same eighteen-month window, the same field service organisations, the same qualification engineers and the same specialised subcontractors are being asked to be in several countries at once. Programmes that were sized independently end up competing operationally, and the projects with the least local depth feel it first.

India's exposure to this is specific rather than general. The country is building a first-of-kind facility without a domestic fab construction industry to draw on, which means both the specialist trades and the supervision have to be imported into a market that is already tight. Two entries in the Dholera record read directly against that backdrop: the ground-engineering redesign reported by the Economic Times on 28 November 2025, and civil progress at about 50 percent as of mid-2026 with cleanroom fit-out underway REPORTED. Neither is unusual for a first fab, and both are exactly the sort of item a tight global input market makes harder rather than easier. The slippage explainer sets out the general mechanism, and the foundation investigation carries the specific one.

India's position, argued from its own approved list

The most useful description of India's place in this race is not an ambition statement. It is the composition of the projects that have actually been approved.

The Press Information Bureau backgrounder of 7 February 2026 records ten projects worth Rs 1.60 lakh crore approved across six states as of December 2025 DURABLE. Reporting of the portfolio at mid-2026, after the Union Cabinet's further clearances in May 2026, puts the count at twelve units and cumulative investment above Rs 1.64 lakh crore, sorted as one silicon fab, one silicon carbide fab, one integrated gallium nitride micro LED display fab and nine packaging units REPORTED. This record keeps those two counts at different tiers on purpose, and it never attributes the national total to Dholera; the fab there accounts for Rs 91,526 crore of it.

Nine of twelve units being packaging is the single most descriptive fact about India's entry. It says the country is doing what industrial entrants generally do, which is start at the rung with the lowest capital intensity and the fastest path to running output, and it is consistent with the first physical output of the programme coming from a Sanand packaging plant rather than from a fab. It also means the programme's near-term output and employment record will be written mostly by packaging plants.

On the fab rung, one project exists and it is aimed at 28 to 110nm, with Bloomberg reporting on 17 July 2026 that it will open mostly at 90nm against a chairman's letter that had said 28nm, a contradiction this record documents rather than resolves on the node page. That is a mature-node entry into a segment where the leading-edge programmes are not competing hard, which is a more defensible position than it sounds.

What India does not have, stated plainly

A record that only publishes the favourable half of a comparison is not a record. The gaps, each of them structural rather than temporary:

• No advanced logic capability, and nothing below 28nm approved. The roadmap to 3nm and 2nm nodes set out in the Press Information Bureau backgrounder of 7 February 2026 is a stated goal with no approved project behind it TARGET.
• No extreme ultraviolet lithography, which is the gate on advanced logic anywhere.
• No memory fabrication. Micron's Sanand plant assembles and tests memory; it does not make the die.
• No domestic equipment industry and no domestic materials industry of consequence, which is the explicit target of ISM 2.0 rather than an achievement of ISM 1.0.
• No announced customer for the fab under construction, which remains the largest single hole in the Dholera record.

Those five are why this desk treats claims of India joining the top tier of semiconductor nations as targets rather than trajectories. The mission's own stated goals, capability to design and manufacture chips for nearly 70 to 75 percent of domestic applications by 2029 and a place among the leading semiconductor nations by 2035, are exactly that, stated goals with dates, and they will be scored here on delivery.

The three assets that do not show up in a programme table

Comparing national programmes by outlay understates India on three counts, and each is verifiable rather than rhetorical.

The first is design workforce. The Press Information Bureau backgrounder records that under the design linked incentive scheme, as of January 2026, twenty-four design startups were supported, around 67,000 students and over 1,000 startup engineers were using national design tools, 122 academic designs had been taped out with 56 chips fabricated at 180nm at the Semiconductor Laboratory in Mohali, and startups had completed 16 tape-outs including six chips fabricated at nodes as advanced as 12nm DURABLE. Those are small numbers in industrial terms and large numbers in pipeline terms.

The second is domestic demand. The same document records that India consumes nearly 20 percent of global microprocessor output and puts the domestic semiconductor market at about US$38 billion in 2023 and US$45 to 50 billion in 2024 to 2025, projected to reach US$100 to 110 billion by 2030. A fab with a domestic buyer base is a different proposition from a fab that must export from day one.

The third is cost base, in construction, in utilities and in technical labour. This record has no verified comparative figure for it and will not invent one, so it is listed as a factor rather than quantified.

How this record scores the race

Programme announcements are not comparable across countries and this desk does not try to rank them. What is comparable is delivery, and delivery in this industry produces four kinds of evidence that no press release can substitute for.

Those four are tools physically arriving and being installed, process qualification actually completing, customers announcing designs into a fab, and then yield, whose slope decides whether any of the preceding matters commercially. They are what this record watches at Dholera, and they are what it would watch at Chitose, Phoenix or Taylor if those sites were its beat. Every other measure, including the ones this page has just tabulated, is a proxy.

India's realistic position, argued from its own approved list rather than from ambition, is a late, small, mature-node and packaging-weighted entry with a strong design workforce and a large domestic demand base, running against a global build-out that is competing for the same scarce inputs. That is a defensible position and it is not a leading one, and both halves of that sentence belong in any honest account. The running detail sits in this record's company files and its ledger of committed capital.